Zobrazeno 1 - 10
of 12
pro vyhledávání: '"Hyung-Rok Oh"'
Publikováno v:
Journal of Digital Contents Society. 22:1115-1123
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b1f705fa165f0115dfb1aa576b2ebcfd
https://doi.org/10.9728/dcs.2021.22.7.1115
https://doi.org/10.9728/dcs.2021.22.7.1115
Autor:
Hye-Jin Kim, Won-Ryul Chung, Sang-beom Kang, Chang-han Choi, Yong-Jin Yoon, Mu-Hui Park, Yu-Hwan Ro, Woo-Yeong Cho, Ki-Sung Kim, Young-Ran Kim, Chang-Hyun Kim, Du-Eung Kim, Beak-Hyung Cho, Byung-Gil Choi, Joon-Min Park, Hongsik Jeong, Kwang-Suk Yu, In-Cheol Shin, Kwang-Jin Lee, Chang-Soo Lee, Gitae Jeong, Choong-keun Kwak, Ki-won Lim, Qi Wang, Joon-Yong Choi, Kinam Kim, Hyung-Rok Oh, Ho-Keun Cho
Publikováno v:
IEEE Journal of Solid-State Circuits. 43:150-162
A 512 Mb diode-switch PRAM has been developed in a 90 nm CMOS technology. The vertical diode-switch using the SEG technology has achieved minimum cell size and disturbance-free core operation. A core configuration, read/write circuit techniques, and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3bb56c06a68aad78d573d48f4282847e
https://doi.org/10.1109/jssc.2007.908001
https://doi.org/10.1109/jssc.2007.908001
Autor:
Hyung-Rok Oh, Woo Yeong Cho, Kinam Kim, Du-Eung Kim, Su-Yeon Kim, Qi Wang, Hyun-Geun Byun, Byung-Gil Choi, Chang-Soo Lee, Kwang-Jin Lee, Sang-beom Kang, Gitae Jeong, Mu-Hui Park, Young-Ran Kim, Beak-Hyung Cho, Hongsik Jeong, Yun-Seung Shin, Ki-Sung Kim, Yu Hwan Ro, Choong-keun Kwak, Hye-Jin Kim, Choong-Duk Ha
Publikováno v:
IEEE Journal of Solid-State Circuits. 42:210-218
A 256-Mb phase-change random access memory has been developed, featuring 66-MHz synchronous burst-read operation. Using a charge pump system, write performance was characterized at a low supply voltage of 1.8 V. Measured initial read access time and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5ac21a148dba58b8028a73848294492b
https://doi.org/10.1109/jssc.2006.888349
https://doi.org/10.1109/jssc.2006.888349
Autor:
Sang-beom Kang, Du-Eung Kim, Byung-Gil Choi, Gitae Jeong, Beak-Hyung Cho, Kinam Kim, Hyung-Rok Oh, Hyun-Geun Byun, Woo Yeong Cho, Hye-Jin Kim, Ki-Sung Kim, Choong-keun Kwak, Hongsik Jeong
Publikováno v:
IEEE Journal of Solid-State Circuits. 41:122-126
The write performance of the 1.8-V 64-Mb phase-change random access memory (PRAM) has been improved, which was developed based on 0.12-/spl mu/m CMOS technology. For the improvement of RESET and SET distributions, a cell current regulator scheme and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::94cfb2e131b410ec79036049fd050880
https://doi.org/10.1109/jssc.2005.859016
https://doi.org/10.1109/jssc.2005.859016
Autor:
Woo-Yeong Cho, Qi Wang, Kinam Kim, Chang-han Choi, Du-Eung Kim, Hongsik Jeong, Yu-Hwan Ro, Joon-Min Park, Byung-Gil Choi, Hye-Jin Kim, Won-Ryul Chung, Ho-Keun Cho, Young-Ran Kim, Beak-Hyung Cho, Ki-Sung Kim, Joon-Yong Choi, Sang-beom Kang, In-Cheol Shin, Kwang-Jin Lee, Ki-won Lim, Mu-Hui Park, Choong-keun Kwak, Chang-Hyun Kim, Kwang-Suk Yu, Chang-Soo Lee, Gitae Jeong, Hyung-Rok Oh
Publikováno v:
ISSCC
A 512Mb diode-switch PRAM is developed in a 90nm CMOS technology. A core configuration, read/write circuit techniques, and a charge-pump system for the diode-switch PRAM are described. Through these schemes, the PRAM achieves read throughput of 266MB
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f65c7e0083e2afc1b5695f454bb9522b
https://doi.org/10.1109/isscc.2007.373499
https://doi.org/10.1109/isscc.2007.373499
Autor:
Sang-beom Kang, Hyung-Rok Oh, Young-Nam Hwang, Beak-Hyung Cho, Ki-Sung Kim, Suseob Ahn, Du-Eung Kim, Hongsik Jeong, Byung-Gil Choi, Kyung-Hee Kim, Hyun-Geun Byun, Gwan-Hyeob Koh, Choong-keun Kwak, Kinam Kim, Gitae Jeong, Woo Yeong Cho
Publikováno v:
2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).
A nonvolatile 64-Mb 1T1R phase-transition random access memory (PRAM) has been developed by fully integrating chalcogenied storage material (GST: Ge/sub 2/Sb/sub 2/Te/sub 5/) into 0.18-/spl mu/m CMOS technology. To optimize SET/RESET distribution, 51
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c16883055e0beed93e7af538aa6d6d78
https://doi.org/10.1109/isscc.2004.1332583
https://doi.org/10.1109/isscc.2004.1332583
Autor:
Kwang-Jin Lee, Beak-Hyung Cho, Woo-Yeong Cho, Sangbeom Kang, Byung-Gil Choi, Hyung-Rok Oh, Chang-Soo Lee, Hye-Jin Kim, Joon-Min Park, Qi Wang, Mu-Hui Park, Yu-Hwan Ro, Joon-Yong Choi, Ki-Sung Kim, Young-Ran Kim, In-Cheol Shin, Ki-Won Lim, Ho-Keun Cho, Chang-Han Choi, Won-Ryul Chung
Publikováno v:
2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers; 2007, p472-616, 145p
Autor:
Kwang-Jin Lee, Beak-Hyung Cho, Woo-Yeong Cho, Sangbeom Kang, Byung-Gil Choi, Hyung-Rok Oh, Chang-Soo Lee, Hye-Jin Kim, Joon-Min Park, Qi Wang, Mu-Hui Park, Yu-Hwan Ro, Joon-Yong Choi, Ki-Sung Kim, Young-Ran Kim, In-Cheol Shin, Ki-Won Lim, Ho-Keun Cho, Chang-Han Choi, Won-Ryul Chung
Publikováno v:
IEEE Journal of Solid-State Circuits; Jan2008, Vol. 43 Issue 1, p150-162, 13p, 1 Black and White Photograph, 1 Diagram, 1 Chart, 1 Graph
Autor:
Sangbeom Kang, Woo Yeong Cho, Beak-Hyung Cho, Kwang-Jin Lee, Chang-Soo Lee, Hyung-Rok Oh, Byung-Gii Choi, Qi Wang, Hye-Jin Kim, Mu-Hui Park, Yu Hwan Ro, Suyeon Kim, Choong-Duk Ha, Ki-Sung Kim, Young-Ran Kim, Du-Eung Kim, Choong-Keun Kwak, Hyun-Geun Byun, Gitae Jeong, Hongsik Jeong
Publikováno v:
IEEE Journal of Solid-State Circuits; Jan2007, Vol. 42 Issue 1, p210-218, 9p, 10 Diagrams, 1 Chart, 9 Graphs
Autor:
Hyung-rok Oh, Beak-hyung Cho, Woo Yeong Cho, Sangbeom Kang, Byung-gil Choi, Hye-jin Kim, Ki-sung Kim, Du-eung Kim, Choong-keun Kwak, Hyun-geun Byun, Gi-tae Jeong, Hong-sik Jeong, Kinam Kim
Publikováno v:
IEEE Journal of Solid-State Circuits; Jan2006, Vol. 41 Issue 1, p122-126, 5p, 1 Black and White Photograph, 2 Diagrams, 4 Graphs