Zobrazeno 1 - 10 of 67 pro vyhledávání: '"Hyunbean Yi"'
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Akademický článek
Sow Posture Analysis and Estrus Prediction Using Closed-Circuit Television Cameras
Autor: Sookeun Song, Taegeun Kang, Kyungtae Lim, Konmin Kim, Hyunbean Yi
Publikováno v: IEEE Access, Vol 12, Pp 17460-17466 (2024)
Sow estrus detection is one of the most critical tasks for improving the production performance of pig farms. However, accurately determining the onset of estrus is challenging because it is time consuming to check each sow and their performance, par
Externí odkaz: https://doaj.org/article/aa9d5a1e555a49948d117c5bd194158b
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5
On Diagnosing the Aging Level of Automotive Semiconductor Devices
Autor: Hyunbean Yi, Dooyoung Kim, Sungju Park, Jihun Jung, Muhammad Adil Ansari
Publikováno v: IEEE Transactions on Circuits and Systems II: Express Briefs. 64:822-826
Semiconductor aging is a serious threat to the reliability of a system. We address the aging level of semiconductor components by describing the degree of semiconductor aging under certain operating conditions, including voltage, frequency, temperatu
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::3e1d176137384be87ebb9cbf17d5e083
https://doi.org/10.1109/tcsii.2016.2601959
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7
A Boundary-Scan Based On-Line Circuit Performance Monitoring Scheme
Autor: Jeongseok Park, Hyunbean Yi, Taegeun Kang
Publikováno v: Journal of the Institute of Electronics and Information Engineers. 53:51-58
As semiconductor technology has developed, device performance has been improved. However, since device structures became smaller, circuit aging due to operational and environmental conditions can be accelerated. Circuit aging causes a performance deg
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::a63a421b8d53da2195a4a4431ad38c33
https://doi.org/10.5573/ieie.2016.53.1.051
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8
A Design of FPGA Self-test Circuit Reusing FPGA Boundary Scan Chain
Autor: Taegeun Kang, Hyunbean Yi, Hyunsik Yoon
Publikováno v: Journal of the Institute of Electronics and Information Engineers. 52:70-76
This paper introduces an FPGA self-test architecture reusing FPGA boundary scan chain as self-test circuits. An FPGA boundary scan cell is two or three times bigger than a normal boundary scan cell because it is used for configuring the function of i
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::39e602eb34c7167d1f54591b211d230a
https://doi.org/10.5573/ieie.2015.52.6.070
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9
A Scan-Based On-Line Aging Monitoring Scheme
Autor: Hyunbean Yi, Michiko Inoue, Tomokazu Yoneda
Publikováno v: JSTS:Journal of Semiconductor Technology and Science. 14:124-130
In highly reliable and durable systems, failures due to aging might result in catastrophes. Aging monitoring techniques to prevent catastrophes by predicting such a failure are required. This paper presents a scan-based on-line aging monitoring schem
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::5392685e3c5a08e63d19eadb5e9d6db4
https://doi.org/10.5573/jsts.2014.14.1.124
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10
An On-Chip Test Clock Control Scheme for Circuit Aging Monitoring
Autor: Hyunbean Yi
Publikováno v: JSTS:Journal of Semiconductor Technology and Science. 13:71-78
In highly reliable and durable systems, failures due to aging might result in catastrophes. Aging monitoring techniques to prevent catastrophes by predicting such a failure are required. Aging can be monitored by performing a delay test at faster clo
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::591dcbf6c1c125766ceb2d25369666fe
https://doi.org/10.5573/jsts.2013.13.1.071
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