Zobrazeno 1 - 4
of 4
pro vyhledávání: '"Hyun Chul Noh"'
Autor:
Jae-Yup Lee, Seung-Hoon Lee, Hyun-Chul Noh, Se-Won Kim, Heesub Lee, Young-Jae Cho, Kyung-Hoon Lee
Publikováno v:
ISCAS (4)
This work describes a two-step pipelined 8 bit 240 MS/s 0.18 /spl mu/m CMOS ADC as one of the embedded cells for high-performance displays requiring low-noise on-chip references and dual-mode inputs with the specifications of limited pins, low power,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ed80bde205ddf61217c1db4dd6c0b008
https://doi.org/10.1109/iscas.2005.1465521
https://doi.org/10.1109/iscas.2005.1465521
Autor:
Dong Ho Lee, Hyun Chul Noh
Publikováno v:
Electronics Letters. 35:182
A new test set compaction method that uses multiple frame vectors to test fully scanned sequential circuits is proposed. The FAN algorithm is extended to generate compact multiple frame test vectors. The proposed method generates the smallest test se
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::81e55eb6e284c523c455498a6660b442
https://doi.org/10.1049/el:19990145
https://doi.org/10.1049/el:19990145
Autor:
Dong Ho Lee, Hyun Chul Noh
Publikováno v:
Electronics Letters. 33:2028
The partial scan test method has a hidden overhead of data holding during scan shifting. The authors argue that the overhead is avoidable and demonstrate this by presenting a partial scan test method which consists of an FAN-based sequential ATPG alg
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bdb65c9a1422d819b892e667f08678ff
https://doi.org/10.1049/el:19971414
https://doi.org/10.1049/el:19971414
Autor:
Se-Won Kim, Young-Jae Cho, Kyung-Hoon Lee, Seung-Hoon Lee, Jae-Yup Lee, Hyun-Chul Noh, Hee-Sub Lee
Publikováno v:
2005 IEEE International Symposium on Circuits & Systems; 2005, p4054-4054, 1p