Zobrazeno 1 - 10
of 28
pro vyhledávání: '"Hyuk Su Son"'
Publikováno v:
IEEE Transactions on Microwave Theory and Techniques. 68:3045-3055
This article presents a 60-GHz CMOS power amplifier (PA) with an adaptive impedance-compensation linearizer in the 65-nm CMOS process. The proposed linearizer adaptively provides resistance and capacitance that vary appropriately with input power, en
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 66:1351-1355
This brief proposes a wideband CMOS power amplifier (PA) with flat gain using a pole-controlled transformer in the sub-THz band for wireless chip-to-chip communication. An analysis of the transformer-based interstage matching network is presented, wh
Publikováno v:
2019 IEEE Asia-Pacific Microwave Conference (APMC).
A 120 GHz wireless radio link for high-speed chip-to-chip communication is presented. Targeting a signal-to-noise ratio (SNR) of 15 dB and transmission distance of 10 cm, the wideband up and down-conversion mixers, PA, and LNA were designed using wid
Autor:
Hyuncheol Park, Dong Min Kang, Hyuk Su Son, Chul Soon Park, Seung Hun Kim, Seongbae Jun, Tae Hwan Jang
Publikováno v:
Wireless Days
In this work, a 120 GHz wireless link for on-board chip-to-chip communication is presented for the case of a 20 mm transmission distance. A Y-shaped antenna is used for wideband, on-board connection, and a PA-antenna-LNA link is measured to evaluate
Autor:
Chul Soon Park, Hyuk Su Son, Chae Jun Lee, Seung Hun Kim, Joon Hyung Kim, Chul Woo Byeon, Dong Min Kang
Publikováno v:
2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).
This paper presents a 120 GHz low-power wideband I/Q transmitter in a 40 nm CMOS technology for wireless chip to chip communication. The proposed transmitter consists of an up-conversion mixer, a Quadrature Injection-Locked Oscillator (QILO), gain am
Autor:
Hong Yi Kim, Tae Hwan Jang, Hee Sung Lee, Seung Hun Kim, Chae Jun Lee, Dong Min Kang, Chul Woo Byeon, Hyuk Su Son, Chul Soon Park
Publikováno v:
RWS
This paper presents a 60-GHz low-profile, wide-band, and high-gain E-shaped patch array with parasitic patches for 60-GHz band. To enhance the bandwidth with low-profile single layer structure, E-shaped patch antenna is applied to form a two resonanc
Autor:
Dong Min Kang, Chae Jun Lee, Tae Hwan Jang, Chul Woo Byeon, Hyuk Su Son, Seung Hun Kim, Chul Soon Park, Hee Sung Lee
Publikováno v:
2018 IEEE 18th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF).
This paper presents a 120 GHz low-power down converter in a 65 nm complementary metal-oxide-semiconductor (CMOS) process for chip to chip communication. The center frequency of the down converter is 120 GHz. The proposed down converter consists of an
Publikováno v:
IEEE Microwave and Wireless Components Letters. 26:510-512
This letter presents a four-stage power amplifier (PA) with four-way transformer-based current combining using a standard 65 nm CMOS process. Each stage consists of common source (CS) topology with a capacitive cross-coupling neutralization to improv
Publikováno v:
2017 Progress in Electromagnetics Research Symposium - Fall (PIERS - FALL).
This paper presents a D-band six-stage low noise amplifier design in 65nm CMOS process. The single stage amplifier consists of combined cascode topology and common source topology to achieve high gain and save power consumption. For a high-data rate
Publikováno v:
IEEE Transactions on Microwave Theory and Techniques. 61:3951-3960
In this paper, a new envelope amplifier (EA) scheme incorporating a linear regulator array is presented. The proposed EA achieves a higher efficiency over a wide envelope range utilizing multiple linear regulators. The linear regulators biased as mul