Zobrazeno 1 - 10
of 12
pro vyhledávání: '"Hyoung-Kook Kim"'
Publikováno v:
Journal of Electronic Testing. 29:49-72
This paper presents a test method for testing two-D-flip-flop synchronizers in an asynchronous first-in-first-out (FIFO) interface. A faulty synchronizer can have different fault behaviors depending on the input application time, the fault location,
Publikováno v:
Journal of Electronic Testing. 26:367-392
This paper presents fault modeling and analysis for bridging defects in a synchronizer that is implemented by two D flip-flops. Bridging defects are injected into any two nodes of the synchronizer, and HSPICE is used to perform circuit analysis. The
Publikováno v:
International Journal of Urban Sciences. 10:140-148
Neighborhood Quality of Life indicators are constructed based on diverse neighborhood profiles to get a full understanding of residents' well-being in the neighborhoods examined. The results of Neighborhood Quality of Life assessments have traditiona
Autor:
Ji Han Kim, Ji-Sun Shin, Soo Heui Paik, Kyung-Tae Lee, Joo Han Lee, Je Hak Kim, Hyoung Kook Kim, Yong Ha Chi, Suran Ryu, Young-Wuk Cho
Publikováno v:
Biologicalpharmaceutical bulletin. 36(3)
Since inhibition of angiotensin II type 1 (AT1) receptor reduces chronic inflammation associated with hypertension, we evaluated the anti-inflammatory potential and the underlying mechanism of fimasartan, a Korean Food and Drug Administration approve
Publikováno v:
Asian Test Symposium
This paper presents fault modeling and analysis for resistive bridging defects in a synchronizer constructed with two D flip-flops. Bridging defects are exhaustively injected into any two nodes of the synchronizer to find all possible faults that mig
Autor:
Wen-Ben Jone, Hyoung-Kook Kim
Publikováno v:
2008 IEEE National Aerospace and Electronics Conference.
This paper presents fault modeling and analysis for bridging defects in a synchronizer that is implemented by two D flip-flops. Bridging defects are injected into any two nodes of the syncronizer, and HSPICE is used to perform circuit analysis. The d
Autor:
Hyoung-Kook Kim, Yong-Sun Koh, Chang-Lyong Song, Dae-Joung Kim, Young-Seok Kim, Chun-Suk Suh, Seok-Hwan Oh
Publikováno v:
SPIE Proceedings.
As the design rule of device has shrunken, obtaining a feasible process window at low k1 factor in photolithography is the major concerning in order to shorten the total period from development to the mass production of devices. In this low k1 factor
Publikováno v:
2009 Asian Test Symposium; 2009, p443-449, 7p
Publikováno v:
2009 24th IEEE International Symposium on Defect & Fault Tolerance in VLSI Systems; 2009, p164-172, 9p
Autor:
Hyoung-Kook Kim, Wen-Ben Jone
Publikováno v:
2008 IEEE National Aerospace & Electronics Conference; 2008, p397-403, 7p