Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Hyman Shanan"'
Autor:
Mohamed Atef Shehata, Michael F. Keaveney, Vivek Roy, Hyman Shanan, Robert Bogdan Staszewski, James Breslin
Publikováno v:
IEEE Solid-State Circuits Letters. 4:72-75
In this letter, we propose a 32–42-GHz frequency quadrupler that performs digital logic operations between four phase-shifted differential signals at one-fourth of the output frequency. The four phase-shifted signals are generated via a 10-GHz rota
Publikováno v:
2022 IEEE International Solid- State Circuits Conference (ISSCC).
Publikováno v:
ICECS
Unlike its low frequency counterpart, the RTWO does not benefit from the multimode nature of the resonator at high frequencies. In this paper, the limits of the traditional RTWO topology are explained and ways to approach them validated. The 40GHz de
Autor:
Robert Bogdan Staszewski, Hyman Shanan, Mohamed Atef Shehata, Michael F. Keaveney, James Breslin, Vivek Roy
Publikováno v:
IEEE Solid-State Circuits Letters. 4:104-104
In the above article [1] , Fig. 1 was incorrectly provided. The correct figure and full caption appear here.
Autor:
P. Crowley, C. Billon, P. Quinlan, Muhammad Kalimuddin Khan, S. O'mahony, J. Lopez Orive, K. Mulvaney, G. Retz, M. Chanca, Hyman Shanan
Publikováno v:
IEEE Communications Magazine. 47:150-158
This article describes the design considerations for low-power short-range radio transceivers with a focus on the 2.4 GHz PHY layer defined as part of the IEEE 802.15.4 standard. The specification requirements for IEEE 802.15.4-compliant transceivers
Publikováno v:
ESSCIRC
If the modulus of the DΔΣM in a fractional-N frequency synthesizer is a power of two, then the output frequency is constrained to be a rational multiple of the phase detector frequency (fPD), where the denominator of the rational multiplier is a po
Autor:
Thomas Conway, Charley Billon, Muhammad Kalimuddin Khan, Philip Quinlan, Richard Conway, Kenneth J. Mulvaney, Hyman Shanan, Shane O Mahony
Publikováno v:
IET Irish Signals and Systems Conference (ISSC 2010).
A low power integrated transceiver incorporating a full Industrial Scientific Medical (ISM) band low IF transmitter and receiver with an application specific RISC processor design is described. The RISC processor contains hardware acceleration blocks
Publikováno v:
ISSCC
A fully integrated 2.4GHz 2Mb/s transmitter which is part of a highly integrated WPAN RF transceiver SoC using a 0.18µm RFCMOS 1P6M process is presented. The transmitter uses a ΔΣ fractional-N PLL architecture. It transmits 2Mb/s GFSK and GMSK mod
Autor:
Kenneth J. Mulvaney, Shane A. O'Mahony, Philip Quinlan, K. Khan, G. Retz, Patrick G. Crowley, Miguel Chanca, Hyman Shanan, Charley Billon
Publikováno v:
ISSCC
The IC presented in this paper is a highly integrated low-power RF transceiver for wireless sensor networks (WSN) compliant with the IEEE 802.15.4 2.4GHz WPAN standard. It contains a radio controller with sleep timer and can perform higher-level MAC
Autor:
Hyman Shanan, Michael Peter Kennedy
Publikováno v:
Proceedings of the 30th European Solid-State Circuits Conference.
This work presents a technique for reducing the flicker noise up-conversion to phase noise in CMOS LC voltage-controlled oscillators (VCOs). The technique is a modification to a standard VCO, which can achieve about 6 dB of improvement in phase noise