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Performance vs. Reliability Adaptive Body Bias Scheme in 28nm & 14nm UTBB FDSOI nodes

Autor: M. Ndiaye, Cheikh, Huard, Vincent, Federspiel, Xavier, BRAVAIX, Alain

Publikováno v: Microelectronics Reliability
Microelectronics Reliability, Elsevier, 2016, 64, pp.158-162
Microelectronics Reliability, 2016, 64, pp.158-162

International audience

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::6f54df8c45894fe37dc0d207d735b25e
https://hal.archives-ouvertes.fr/hal-01977447

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation

Autor: Parthasarathy, Chittoor, Bravaix, Alain, Guérin, Chloé, Denais, Mickael, Huard, Vincent

Practical and accurate Design-in Reliability methodology has been developedfor designs on 90-45nm technology to quantitatively assess the degradationdue to Hot Carrier and Negative Bias Temperature Instability. Simulationcapability has been built on

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=od_______166::afffd335af7898b6619cbbbb30477570
https://hal.science/hal-03660397

Hot-Carrier Degradation in Decananometer CMOS Nodes: From an Energy-Driven to a Unified Current Degradation Modeling by a Multiple-Carrier Degradation Process.

Autor: Bravaix, Alain, Huard, Vincent, Cacho, Florian, Federspiel, Xavier, Roy, David

Publikováno v: Hot Carrier Degradation in Semiconductor Devices; 2015, p57-103, 47p

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