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pro vyhledávání: '"Hsin-Hao Peng"'
Autor:
Hsin-Hao Peng, 彭信豪
99
In this paper, we have proposed area-efficient decimal adders with three inputs. By using proposed analyzer circuits and the generation of correction terms with recursive schemes, our proposed decimal adders could perform efficient summations
In this paper, we have proposed area-efficient decimal adders with three inputs. By using proposed analyzer circuits and the generation of correction terms with recursive schemes, our proposed decimal adders could perform efficient summations
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/11474026460945298310
Publikováno v:
ISOCC
In this paper, parallel and digit-serial implementations of area-efficient 3-operand decimal adders are proposed. By using proposed analyzer circuits and the generation of correction terms with recursive schemes, our proposed decimal adders could per
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d397d761fd9cd848aaf6f57ecd577310
https://doi.org/10.1109/isocc.2012.6407084
https://doi.org/10.1109/isocc.2012.6407084
Publikováno v:
VLSI-SoC
In this paper, we have proposed area-efficient 3-input decimal adders using simplified carry and sum vectors. By using proposed generator circuits and the recursive generation of correction terms, our proposed decimal adders could perform efficient s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a521259992e4ac71fdaacedbb62911ba
https://doi.org/10.1109/vlsisoc.2011.6081625
https://doi.org/10.1109/vlsisoc.2011.6081625
Publikováno v:
2011 IEEE/IFIP 19th International Conference on VLSI & System-on-Chip (VLSI-SoC); 2011, p25-30, 6p