Zobrazeno 1 - 10
of 187
pro vyhledávání: '"Hsie-Chia Chang"'
Publikováno v:
IEEE Open Journal of Circuits and Systems, Vol 5, Pp 189-198 (2024)
The trade-off between decoding performance and hardware costs has been a long-standing challenge in Low-Density Parity Check (LDPC) decoding. Based on model-driven methodology, the Neural Network-Aided Variable Weight Min-Sum (NN-aided vwMS) algorith
Externí odkaz:
https://doaj.org/article/a98f71dc5c244f1b8e06b29ad6194ee7
Publikováno v:
IEEE Open Journal of Circuits and Systems, Vol 3, Pp 180-191 (2022)
The routing congestion over a QC-LDPC decoder with a large circular permutation matrix (CPM) size has long been an obstacle to high throughput designs. This paper presents a large-CPM congestion-free decoder for (18396, 16416) quasi-cyclic Euclidean
Externí odkaz:
https://doaj.org/article/7e21f5ab3bb444df8c815a22ef5a54a2
Publikováno v:
IEEE Open Journal of Circuits and Systems, Vol 3, Pp 228-236 (2022)
An error floor phenomenon, decoding performance, and throughput are three major concerns for LDPC decoders in NAND Flash applications. With a penalty method and an active iteration mechanism, we present a Unified Penalty Gradient Descent Bit Flipping
Externí odkaz:
https://doaj.org/article/b5eb97da9c2a4d85a9b6c1d12bf42fda
Publikováno v:
2022 IEEE 4th International Conference on Artificial Intelligence Circuits and Systems (AICAS).
Publikováno v:
ICASSP 2022 - 2022 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP).
Publikováno v:
2021 IEEE Asian Solid-State Circuits Conference (A-SSCC).
Publikováno v:
ISCAS
This paper presents a reconfigurable LDPC decoder implementation fully compliant with all the configurations in the 5G NR standard. Based on the row-based layered normalized Min-Sum (NMS) algorithm, the optimization approaches are proposed to solve t
Publikováno v:
IEEE Journal of Solid-State Circuits. 55:3-5
This Special Issue of the IEEE Journal of Solid-State Circuits is dedicated to a collection of the best articles selected from the 2019 IEEE International Solid-State Circuits Conference (ISSCC) that took place on February 17–21, 2019, in San Franc
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 66:1219-1230
In this paper, a (21150, 19050) globally-coupled low-density parity check (GC-LDPC) code designed for NAND flash memories is presented. The proposed LDPC code comprises three disjoint subcodes which can be decoded independently. This highly structura
Publikováno v:
ISSCC
The forum provides a comprehensive full-stack (hardware and software) view of ML acceleration from cloud to edge. The first talk focuses on the main design and benchmarking challenges facing large general-purpose accelerators, including multi-die sca
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d10eaa1e912f94fd48c6c414a7225cbb
http://hdl.handle.net/11585/871320
http://hdl.handle.net/11585/871320