Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Howard Leo Kalter"'
Publikováno v:
IEEE Journal of Solid-State Circuits. 33:1731-1740
A built-in self-test engine and test methodology have been developed for testing a family of high-bandwidth, high-density DRAM macros. The DRAM macros range in size from 256/spl times/16/spl times/128 to 2 K/spl times/16/spl times/256 (Word/spl times
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0d750df7304f0b49738906d016865447
https://doi.org/10.1109/4.726568
https://doi.org/10.1109/4.726568
Autor:
Erik L. Hedberg, Christopher P. Miller, Anatol Furman, Wayne F. Ellis, Jeffrey H. Dreibelbis, H. S. Lee, Thomas M. Maffitt, John E. Barth, C.H. Stapper, Howard Leo Kalter, Sridhar Divakaruni
Publikováno v:
IBM Journal of Research and Development. 39:51-62
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::46eb1b7bb9bd300422063873e4b2504c
https://doi.org/10.1147/rd.391.0051
https://doi.org/10.1147/rd.391.0051
Autor:
Scott C. Lewis, James Andrew Yankosky, Charles Edward Drake, J. Dilorenzo, W.B. van der Hoeven, Gordon Arthur Kelley, John A. Fifield, C.H. Stapper, John E. Barth, Howard Leo Kalter
Publikováno v:
IEEE Journal of Solid-State Circuits. 25:1118-1128
A high-speed 16-Mb DRAM chip with on-chip error-correcting code (ECC), which supports either 11/11 or 12/0 RAS/CAS addressing and operates on a 3.3- or 5-V power supply, is described. It can be packaged as a 2-Mb*8, 4-Mb*4, 8-Mb*2, or 16-Mb*1 DRAM, A
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d2702f34cdd58a27bd6517caf2eafc1b
https://doi.org/10.1109/4.62132
https://doi.org/10.1109/4.62132
Publikováno v:
Annual Reliability and Maintainability Symposium 1993 Proceedings.
The number of transistors on integrated-circuit chips is growing exponentially. This makes it increasingly difficult to satisfy the continuing demand for ever higher reliability of chips. The tools available to the chip architects and circuit designe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::87650162bae21409b206079e75bad729
https://doi.org/10.1109/rams.1993.296837
https://doi.org/10.1109/rams.1993.296837
Publikováno v:
Annual Reliability and Maintainability Symposium. 1991 Proceedings.
A combination of redundant circuits and error-correcting-code circuits have been implemented on a 16 Mb memory chip. The combination of these circuits results in a synergistic fault-tolerance scheme, making this chip immune to a high level of manufac
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::25ad813b752eea16a105ca473fe4aa93
https://doi.org/10.1109/arms.1991.154413
https://doi.org/10.1109/arms.1991.154413
Autor:
Scott C. Lewis, William Paul Hovis, John E. Barth, John A. Fifield, Charles Edward Drake, J. Dilorenzo, J. Nickel, C.H. Stapper, Howard Leo Kalter, James Andrew Yankosky, Gordon Arthur Kelley
Publikováno v:
1990 37th IEEE International Conference on Solid-State Circuits.
A 16-Mb DRAM chip fabricated in a 0.5- mu m CMOS process using silicided polysilicon, double metal, and trench storage is described. It incorporates an architecture that supports either 11/11 or 12/10 RAS/CAS (row-address strobe/column-address-strobe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::430a0e21753f7d9711b1ce07d05d2d73
https://doi.org/10.1109/isscc.1990.110210
https://doi.org/10.1109/isscc.1990.110210
Autor:
T. Leasure, J.M. Poplawski, John A. Fifield, C. Patton, P.D. Coppens, S.W. Tomashot, R. Papritz, Howard Leo Kalter, Christopher P. Miller, W.F. Ellis, W.B. van der Hoeven, D.J. Kokoszka, Q. Nguyen
Publikováno v:
IEEE Journal of Solid-State Circuits. 20:914-923
An experimental general purpose 5-V 1-Mb dynamic RAM has been designed for increased performance, high density, and enhanced reliability. The array consists of a one-device overlapped I/O cell with a metal bitline architecture. The cell measures 4.1
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ac0b128727000316d360dec49748fb49
https://doi.org/10.1109/jssc.1985.1052415
https://doi.org/10.1109/jssc.1985.1052415