Zobrazeno 1 - 4
of 4
pro vyhledávání: '"Horatio S. Wildman"'
Autor:
Siddhartha Panda, Chun-Yung Sung, Jinghong Li, C. Ouyang, Meikei Ieong, Conal E. Murray, R. Murphy, N. Klymko, Judson R. Holt, Anita Madan, Horatio S. Wildman, R. J. Davis
Publikováno v:
MRS Proceedings. 913
PFET devices fabricated using embedded SiGe source/drain on (110) silicon substrates have shown significant performance improvement compared to PFETs with embedded SiGe on (100) SOI substrates. In this paper, we report a systematic material character
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::da999070df90ddcd92f482a12807e126
https://doi.org/10.1557/proc-0913-d01-02
https://doi.org/10.1557/proc-0913-d01-02
Autor:
Eva E. Simonyi, Steven E. Molis, K. Ida, M. Sherwood, John A. Fitzsimmons, Daniel C. Edelstein, M. Minami, K. Inoue, Vincent J. McGahay, M. Ono, A. Sakamoto, Y. Shimooka, Baozhen Li, Kaushik A. Kumar, Christopher J. Penny, N. Klymko, M. Cullinan, Sujatha Sankaran, F. Chen, A. Madon, M. Sankar, Cathy Labelle, Johnny Widodo, Jason Gill, M. Fukasawa, Takeshi Nogami, Matthew Angyal, Darryl D. Restaino, Kelly Malone, Horatio S. Wildman, Philip L. Flaitz, Alfred Grill, Jeremy L. Martin, Eric G. Liniger, T. H. Ivers, Son Nguyen, Charles R. Davis, Leo Tai, Henry A. Nye, D. McHerron, Chester T. Dziobkowski, Stephan A. Cohen, Michael Lane, Cathryn Christiansen, Kaushik Chanda, Ian D. Melville, P. McLaughlin, Sarah L. Lane
Publikováno v:
SPIE Proceedings.
This paper discusses low-k/copper integration schemes which has been in production in the 90 nm node, have been developed in the 65 nm node, and should be taken in the 45 nm node. While our baseline 65 nm BEOL process has been developed by extension
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0054a4f10eb29be2feb313a8b2344b8f
https://doi.org/10.1117/12.633066
https://doi.org/10.1117/12.633066
Publikováno v:
International Symposium for Testing and Failure Analysis.
This paper shows that in-line voltage contrast inspection can be used to monitor and debug mechanisms causing via and contact opens using ungrounded chain test structures. This opens up a large number of new opportunities to the benefits of in-line V
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2a967a7708885ee91e4522b26a8de1aa
https://doi.org/10.31399/asm.cp.istfa2005p0401
https://doi.org/10.31399/asm.cp.istfa2005p0401
Autor:
Jinghong Li, Henry K. Utomo, Chun-Yung Sung, Andres Bryant, Qiqing Ouyang, Min Yang, Horatio S. Wildman, N. Klymko, David M. Fried, Massimo V. Fischetti, Gregory Costrini, Siddhartha Panda, Thomas S. Kanarsky, John A. Ott, Judson R. Holt, Huajie Chen, Meikei Ieong, Nivo Rovedo
Publikováno v:
Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..
CMOS devices with embedded SiGe source/drain for pFETs and tensile stressed liner for nFETs have been demonstrated for the first time on hybrid orientation substrates. Ring oscillators have also been fabricated. Significant performance improvement is
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8e438830ceea6944fece9508a6d0b16a
https://doi.org/10.1109/.2005.1469199
https://doi.org/10.1109/.2005.1469199