Zobrazeno 1 - 10
of 39
pro vyhledávání: '"Hoong-Shing Wong"'
Publikováno v:
IEEE Transactions on Electron Devices. 56:1128-1134
We report the integration of a novel selenium segregation (SeS) technology in the silicide contact of strained n-MOSFETs featuring silicon-carbon Si0.99C0.01 source/drain (S/D) stressors. SeS at the NiSi:C/n-Si0.99 C0.01 interface leads to the achiev
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::98305556f8bfbf9de91e8115a3a8b06e
https://doi.org/10.1109/ted.2009.2016143
https://doi.org/10.1109/ted.2009.2016143
Autor:
Kah-Wee Ang, Fang-Yue Liu, Hoong-Shing Wong, Ming Zhu, Yee-Chia Yeo, D.M.Y. Lai, Poh-Chong Lim, Xincai Wang
Publikováno v:
IEEE Electron Device Letters. 29:885-888
We report the first demonstration of a novel germanium-enrichment process for forming a silicon-germanium (SiGe) source/drain (S/D) stressor with a high Ge content. The process involves laser-induced local melting and intermixing of a Ge layer with a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::88d0b79c9add380ff84cf9c5381c7b4f
https://doi.org/10.1109/led.2008.2001029
https://doi.org/10.1109/led.2008.2001029
Publikováno v:
IEEE Electron Device Letters. 29:841-844
We explore a novel silicide contact technology for effective Schottky barrier height PhiBn and contact resistance reduction, which is compatible with an advanced silicon-carbon (Si1-xCx) source/drain (S/D) stressor technology. The new silicide contac
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d05c9f53c2bbac19da529ccd564d3442
https://doi.org/10.1109/led.2008.2000716
https://doi.org/10.1109/led.2008.2000716
Autor:
Keat-Mun Hoe, Chih-Hang Tung, D. Weeks, Michael Bauer, N. Balasubramanian, Yee-Chia Yeo, J. Spear, Kah-Wee Ang, Hoong-Shing Wong, Lap Chan, Ganesh S. Samudra, S.G. Thomas
Publikováno v:
IEEE Electron Device Letters. 29:460-463
We report the first demonstration of n-channel field-effect transistors (N-FETs) with in situ phosphorus-doped silicon-carbon (SiCP) stressors incorporated in the source/drain extension (SDE) regions. A novel process which formed recessed SDE regions
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6bbce1af22dd9609e61d21de50826a34
https://doi.org/10.1109/led.2008.920274
https://doi.org/10.1109/led.2008.920274
Publikováno v:
IEEE Electron Device Letters. 31:1371-1373
We report the first integration of a high-compressive-stress diamond-like carbon (DLC) liner stressor with gate-all-around Si nanowire p-channel field-effect transistor (FET). DLC liner stressors with thicknesses of ~ 20 and ~ 40 nm were formed on p-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f65cca8c0f31fe4dad089adfb835dfb4
https://doi.org/10.1109/led.2010.2074182
https://doi.org/10.1109/led.2010.2074182
Publikováno v:
IEEE Electron Device Letters. 30:1087-1089
We report the first integration of selenium (Se) segregation contact technology in ultrathin-body (UTB) n-MOSFET featuring Ni fully silicided source and drain. During the Ni silicidation process, the implanted Se segregated at the NiSi-n-Si interface
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::295b506d1b8992d67cb75574d61192cd
https://doi.org/10.1109/led.2009.2028660
https://doi.org/10.1109/led.2009.2028660
Publikováno v:
IEEE Electron Device Letters. 29:756-758
We report the first integration of a novel solid antimony (Sb) segregation (SSbS) process in a transistor fabrication flow. A thin solid Sb layer, which acts as a large source of n-type dopants, was deposited beneath a metallic nickel layer prior to
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::886e18337118466b7499e3ea8d3f4e69
https://doi.org/10.1109/led.2008.923712
https://doi.org/10.1109/led.2008.923712
Publikováno v:
IEEE Electron Device Letters. 28:1102-1104
We explore a novel integration approach that introduces valence-mending adsorbates such as sulfur (S) or selenium (Se) by ion implantation and prior to nickel silicidation for the effective reduction of contact resistance and Schottky barrier (SB) he
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8c9e774adae17ff2bf9abb652347227b
https://doi.org/10.1109/led.2007.910003
https://doi.org/10.1109/led.2007.910003
Publikováno v:
IEEE Electron Device Letters. 28:703-705
We report a new method of forming nickel silicide (NiSi) on n-Si with low contact resistance, which achieves a Schottky barrier height of as low as 0.074 eV. Antimony (Sb) and nickel were introduced simultaneously and annealed to form NiSi on n-Si (1
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a78d43d62245e463ac379804e0ec8cda
https://doi.org/10.1109/led.2007.901668
https://doi.org/10.1109/led.2007.901668
Autor:
A.E-J. Lim, Chow Shue-Yin, A.M. Yong, Dongzhi Chi, Tsung-Yang Liow, Wei-Wei Fang, R.T-P. Lee, Ganesh S. Samudra, Kian-Ming Tan, A.T-Y. Koh, Guo-Qiang Lo, Yee-Chia Yeo, Hoong Shing Wong
Publikováno v:
2008 Symposium on VLSI Technology.
We have developed a novel and cost-efficient silicide integration solution to achieve a hole barrier height of 215 meV and electron barrier height of 665 meV simultaneously with a single metallic silicide based on aluminum inter-diffusion. It is prop
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a5e622a99c5b899e03b1753fea9e41b6
https://doi.org/10.1109/vlsit.2008.4588551
https://doi.org/10.1109/vlsit.2008.4588551