Zobrazeno 1 - 10
of 24
pro vyhledávání: '"Hoang Anh Du Nguyen"'
Autor:
Anteneh Gebregiorgis, Hoang Anh Du Nguyen, Jintao Yu, Rajendra Bishnoi, Mottaqiallah Taouil, Francky Catthoor, Said Hamdioui
Faster and cheaper computers have been constantly demanding technological and architectural improvements. However, current technology is suffering from three technology walls: leakage wall, reliability wall, and cost wall. Meanwhile, existing archite
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::0d6ea2609588ba99e966c72de735f2a1
https://lirias.kuleuven.be/handle/20.500.12942/710823
https://lirias.kuleuven.be/handle/20.500.12942/710823
Akademický článek
Tento výsledek nelze pro nepřihlášené uživatele zobrazit.
K zobrazení výsledku je třeba se přihlásit.
K zobrazení výsledku je třeba se přihlásit.
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 41(1)
A novel type of hardware accelerators called automata processors (APs) have been proposed to accelerate finite-state automata. The bone structure of an AP is a hierarchical routing matrix that connects many memory arrays. With this structure, an AP c
Autor:
Jintao Yu, Muath Abu Lebdeh, Said Hamdioui, Francky Catthoor, Mottaqiallah Taouil, Hoang Anh Du Nguyen
Technological and architectural improvements have been constantly required to sustain the demand of faster and cheaper computers. However, CMOS down-scaling is suffering from three technology walls: leakage wall, reliability wall, and cost wall. On t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::491d3e62f536491b3888001980cd3546
https://lirias.kuleuven.be/handle/123456789/663710
https://lirias.kuleuven.be/handle/123456789/663710
Publikováno v:
ASP-DAC
25th Asia and South Pacific Design Automation Conference (ASP-DAC)
25th Asia and South Pacific Design Automation Conference (ASP-DAC)
Conventional computing architectures and the CMOS technology that they are based on are facing major challenges such as the memory bottleneck making the memory access for data transfer a major killer of energy and performance. Computation-in-memory (
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::53cfc9697f258e0421b6b027dfe0a690
http://resolver.tudelft.nl/uuid:da59fea5-2376-4edd-9acb-8ba0c80a2942
http://resolver.tudelft.nl/uuid:da59fea5-2376-4edd-9acb-8ba0c80a2942
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 37(2)
Alternatives to CMOS logic circuit implementations are under research for future scaled electronics. Memristor crossbar-based logic circuit is one of the promising candidates to at least partially replace CMOS technology, which is facing many challen
Akademický článek
Tento výsledek nelze pro nepřihlášené uživatele zobrazit.
K zobrazení výsledku je třeba se přihlásit.
K zobrazení výsledku je třeba se přihlásit.
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25:2206-2219
Today’s computer architectures suffer from many challenges, such as the near end of CMOS downscaling, the memory/communication bottleneck, the power wall, and the programming complexity. As a consequence, these architectures become inefficient in s
Publikováno v:
NANOARCH
Memristive devices have the potential to reduce the memory access bottleneck in conventional computer architectures. However, memristive devices also suffer from low endurance and large resistance variation. To address these problems, we present a ro
Publikováno v:
ISCAS
2019 IEEE International Symposium on Circuits and Systems (ISCAS)
2019 IEEE International Symposium on Circuits and Systems (ISCAS)
Emerging computing applications (such as big-data and Internet-of-things) are extremely demanding in terms of storage, energy and computational efficiency, while todays architectures and device technologies are facing major challenges making them inc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::690d270a8f255d79f0cbcccccea76f1e