Zobrazeno 1 - 10
of 22
pro vyhledávání: '"Hitoshi Shiga"'
Publikováno v:
Journal of Environmental Engineering (Transactions of AIJ). 78:333-340
Autor:
Hong Ding, Yoshihiko Shindo, Kiyomi Naruke, Bo Lei, Hitoshi Shiga, T. Ogawa, Dana Lee, Junichi Sato, Eiichi Makino, Yuka Furuta, Dai Nakamura, Y. Kato, Go Shikata, Yoshinao Suzuki, Hiromitsu Komai, Yohji Watanabe, Alex Mak, T. Miwa, Rieko Tanaka, Manabu Sakai, M. Nakamichi, Takatoshi Minamoto, Gertjan Hemink, Kosuke Yanagidaira, T. Hara, Junji Musha, Brian Murphy, Yoshikazu Hosomura, Naoaki Kanagawa, Ayako Yuminaka, Kiyofumi Sakurai, Toshiaki Edahiro, Koichi Fukuda, Naoya Tokiwa, Koichi Kawakami, M. Higashitani, Makoto Iwai, Mai Muramoto, Yoshiyuki Matsunaga, Teruo Takagiwa, Manabu Watanabe, Osamu Nagao
Publikováno v:
IEEE Journal of Solid-State Circuits. 47:75-84
A 64-Gb MLC (2 bit/cell) NAND flash memory with the highest memory density to date as an MLC flash memory, has been successfully developed. To decrease the chip size, 2-physical-plane configuration with 16 KB wordline-length, a new bit-line hook-up a
Autor:
Atsumasa Yoshiura, Mahito Nakazono, Hitoshi Shiga, Makoto Koganei, Tomonobu Goto, Makoto Mizunuma
Publikováno v:
AIJ Journal of Technology and Design. 17:937-942
Autor:
Makoto Koganei, Makoto Mizunuma, Tomonobu Goto, Hitoshi Shiga, Mahito Nakazono, Atsumasa Yoshiura
Publikováno v:
AIJ Journal of Technology and Design. 17:563-568
In this paper, winter thermal environment of traditional timber house was measured before and after installing thermal insulation and floor heating. After this renovation, comfortable environment without vertical temperature difference had been secur
Autor:
Shinichiro Shiratake, Yoshinori Kumura, S. Ohtsuki, Hitoshi Shiga, Sumiko Doumae, Iwao Kunishima, T. Ozaki, Daisaburo Takashima, Tadashi Miyakawa, Ryu Ogiwara, Akihiro Nitayama, Koji Yamakawa, Katsuhiko Hoya, Syuso Fujii, Susumu Shuto
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 18:1745-1752
A 64-Mb chain ferroelectric RAM (chainFeRAM) is fabricated using 130-nm 3-metal CMOS technology. A newly developed quad bitline architecture, which combines folded bitline configuration with shield bitline scheme, eliminates bitline-bitline (BL-BL) c
Autor:
Koji Hosono, M. Kojima, Shigeo Ohshima, Susumu Fujimura, Shouchang Tsao, N. Hayashida, H. Waki, Ken Oowada, Jeffrey W. Lutze, Makoto Iwai, G. Hemink, Kiyofumi Sakurai, H. Otake, Sumio Tanaka, Mehrdad Mofidi, Shih-Chung Lee, Y. Nozawa, Yohji Watanabe, Y. Kameda, Ken Takeuchi, Jun Wan, Masanobu Shirakawa, K. Hatakeyama, A. Cernea, Teruhiko Kamei, Yoshihiko Shindo, Hitoshi Shiga, Yan Li, Takuya Futatsuyama, Jia-Yi Fu, Masaaki Higashitani, Masayuki Ichige, K. Kanazawa, Naoya Tokiwa, Shinji Sato
Publikováno v:
IEEE Journal of Solid-State Circuits. 42:219-232
A single 3.3-V only, 8-Gb NAND flash memory with the smallest chip to date, 98.8 mm2, has been successfully developed. This is the world's first integrated semiconductor chip fabricated with 56-nm CMOS technologies. The effective cell size including
Publikováno v:
Journal of Environmental Engineering (Transactions of AIJ). 72:67-73
Autor:
Hitoshi Shiga, Mahito Nakazono, Hitomi Hamasuna, Atsumasa Yoshiura, Kazuhiro Fukuyo, Makoto Mizunuma
Publikováno v:
Journal of Environmental Engineering (Transactions of AIJ). 71:39-45
Autor:
Hitomi Hamasuna, Makoto Mizunuma, Mahito Nakazono, Hitoshi Shiga, Yuko Ohuchi, Kazuhiro Fukuyo
Publikováno v:
AIJ Journal of Technology and Design. 11:189-194
Autor:
Hitoshi Shiga, Tadayuki Taura, Yoshinori Takano, S. Atsumi, Kiyomi Naruke, H. Kato, T. Miyaba, Hiroshi Watanabe, K. Watanabe, Akira Umezawa, T. Hara, Naoya Tokiwa, K. Masuda, Tooru Tanzawa
Publikováno v:
IEEE Journal of Solid-State Circuits. 37:1485-1492
The highest bit-density 64-Mb NOR flash memory with dual-operation function of 44 mm/sup 2/ was developed by introducing negative-gate channel-erase NOR flash memory cell technology, 0.16-/spl mu/m CMOS flash memory process technology, and four-bank