Zobrazeno 1 - 10
of 93
pro vyhledávání: '"Hiroyuki Kurino"'
Autor:
Makoto Tamai, Hiroshi Tomita, Tetsu Tanaka, Takafumi Kobayashi, Risato Kobayashi, Keigo Sato, Takafumi Fukushima, Ken Komiya, Mitsumasa Koyanagi, Hiroyuki Kurino
Publikováno v:
Japanese Journal of Applied Physics. 47:3244-3247
We have proposed a new retinal prosthesis system consisting of a three-dimensionally (3-D) stacked retinal prosthesis chip, a flexible cable with an electrode array stimulus, and a power supply system for the retinal prosthesis chip. Electromagnetic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bf54e5e43449145f6138aef7a7e39944
https://doi.org/10.1143/jjap.47.3244
https://doi.org/10.1143/jjap.47.3244
Autor:
Eriko Sugano, Hiroshi Tomita, Mitsumasa Koyanagi, Hiroyuki Kurino, Risato Kobayashi, Takafumi Fukushima, Makoto Tamai, Taiichiro Watanabe, Tetsu Tanaka, Ken Komiya
Publikováno v:
Japanese Journal of Applied Physics. 46:2785-2791
A retinal prosthesis system with a three-dimensionally (3D) stacked LSI chip has been proposed. We fabricated a new implantable stimulus electrode array deposited with Platinum-black (Pt-b) on a polyimide-based flexible printed circuit (FPC) for the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0696dbb540c0bd145983fc6c37171320
https://doi.org/10.1143/jjap.46.2785
https://doi.org/10.1143/jjap.46.2785
Autor:
Tetsu Tanaka, Hiroshi Tomita, Takafumi Fukushima, Mitsumasa Koyanagi, Makoto Tamai, Hiroyuki Kurino, Keigo Sato, Taiichiro Watanabe, Ken Komiya, Takafumi Kobayashi
Publikováno v:
IEEE International Electron Devices Meeting, 2007. IEDM 2007. 2007:1015-1018
To recover visual sensation of blind patients, we have fabricated a fully implantable retinal prosthesis chip that includes photodetector and stimulus current generator. For the first time, we successfully implanted the retinal prosthesis chip bonded
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::918374446cce7eba3b36514e1d686016
http://hdl.handle.net/10097/46419
http://hdl.handle.net/10097/46419
Autor:
Yusuke Yamada, Mitsumasa Koyanagi, Hiroyuki Kurino, T. Nakamura, Takafumi Fukushima, Tetsu Tanaka, H. Kikuchi
Publikováno v:
IEEE Transactions on Electron Devices. 53(11):2799-2808
A three-dimensional (3-D) integration technology has been developed for the fabrication of a new 3-D shared-memory test chip. This 3-D technology is based on the wafer bonding and thinning method. Five key technologies for 3-D integration were develo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d6868ce4a071dc554bf93949eac9a117
http://hdl.handle.net/10097/46522
http://hdl.handle.net/10097/46522
Autor:
Atsushi Kenjo, Fumiya Shoji, Kaoru Sato, Taizoh Sadoh, Mitsumasa Koyanagi, Koji Ueda, Hiroyuki Kurino, Masanobu Miyao
Publikováno v:
Thin Solid Films. 508:178-181
Morphological changes of Co nanodots on SiO 2 layers by thermal treatment have been investigated. Co nanodots were formed by molecular beam deposition of Co on SiO 2 layers with substrate temperatures (30–600 °C) and subsequent post-annealing (500
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fccaad0b2514876b1b9adcde393fe30e
https://doi.org/10.1016/j.tsf.2005.10.005
https://doi.org/10.1016/j.tsf.2005.10.005
Autor:
Mitsumasa Koyanagi, Makoto Tamai, Eriko Sugano, Hiroyuki Kurino, Keita Motonami, Hiroshi Tomita, Takafumi Fukushima, Taiichiro Watanabe, Manami Sato, Jun Deguchi
Publikováno v:
Japanese Journal of Applied Physics. 45:3784-3788
We have proposed a novel multilayer stacked retinal prosthesis chip based on three-dimensional integration technology. Implantable stimulus electrode arrays in polyimide flexible cables were fabricated for the electrical stimulation of the retina. To
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::da72c866a7ab2baf4e37add3b357dc04
https://doi.org/10.1143/jjap.45.3784
https://doi.org/10.1143/jjap.45.3784
Autor:
Mitsumasa Koyanagi, Hoon Choi, Hiroyuki Kurino, Takeshi Sakaguchi, Hyuckjae Oh, Jeoung Chill Shim
Publikováno v:
Applied Surface Science. 224:260-264
The fully depleted (FD) silicon-on-insulator (SOI) MOSFETs with Lg of 0.1 μm were fabricated. For reducing contact resistance and source/drain parasitic series resistance, SiGe elevated source/drain structure and nickel germanosilicide contact layer
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::46b817f1832c839b6d2f45423e6ce720
https://doi.org/10.1016/j.apsusc.2003.08.091
https://doi.org/10.1016/j.apsusc.2003.08.091
Publikováno v:
Materials Science and Engineering: B. 89:435-438
A novel technology to fabricate an ultra shallow source and drain extension (SDE) junctions for the future SOI-MOSFETs was investigated. In this technology, a dopant in an adsorbed layer on SOI surface diffuses into the substrate by the rapid thermal
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::91791f277f87a3e5862576300dce4164
https://doi.org/10.1016/s0921-5107(01)00854-6
https://doi.org/10.1016/s0921-5107(01)00854-6
Autor:
Takashi Matsuura, Ki Seon Kim, Yun Heub Song, Kazuhiro Hane, Mitsumasa Koyanagi, Ki-Tae Park, Hiroyuki Kurino
Publikováno v:
Thin Solid Films. 369:207-212
A new doping method to fabricate an ultra-shallow junction for the sub-0.1 μm pMOSFET was investigated, in which boron in an adsorbed layer diffused into Si substrate during rapid thermal annealing (RTA) at high temperature. This method made it poss
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3e9ef3b10d5b1a4b18093a84f987cc25
https://doi.org/10.1016/s0040-6090(00)00808-7
https://doi.org/10.1016/s0040-6090(00)00808-7
Autor:
H. Tsukamoto, Mitsumasa Koyanagi, K.-H. Yu, T. Matsumoto, Hiroyuki Kurino, H. Itani, Nobuaki Miyakawa
Publikováno v:
Second Annual IEEE International Conference on Innovative Systems in Silicon, 1997. Proceedings. :203-212
It becomes possible to achieve the real time micro-vision system with extremely high image processing speed if three-dimensional LSI comes into reality because a higher level of parallel processing can be performed in three-dimensional LSI. Then, we
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::03d61092896f71e11ad16429a37b3e16
http://hdl.handle.net/10097/46736
http://hdl.handle.net/10097/46736