Zobrazeno 1 - 10
of 34
pro vyhledávání: '"Hirotada Kuriyama"'
Autor:
H. Miyoshi, M. Ashida, S. Maegawa, Hirotada Kuriyama, S. Maeda, Kazuhito Tsutsumi, T. Nishimura, K. Anami, Y. Kohno
Publikováno v:
IEEE Transactions on Electron Devices. 46:927-932
This paper proposes a compact single-bit line SRAM memory cell, which we call an asymmetric memory cell (AMC), using a complementary thin-film transistor (C-TFT). A C-TFT is composed of a top-gate n-channel TFT and a bottom-gate p-channel TFT. The pr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::327c18c8823fa050e909d00b2ef83bd2
https://doi.org/10.1109/16.760399
https://doi.org/10.1109/16.760399
Autor:
M. Ashida, T. Ipposhi, S. Maeda, Yasuo Inoue, H. Miyoshi, S. Maegawa, A. Yasuoka, Hirotada Kuriyama
Publikováno v:
IEEE Transactions on Electron Devices. 45:165-172
The variation of the threshold voltage shift (V/sub th/ shift) caused by negative-bias temperature stress (-BT stress) in poly-crystalline silicon thin-film transistors (poly-Si TFTs) was investigated. Based on the chemical reaction caused by -BT str
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9b4e36b6e63485ef7862ddf11d67fd50
https://doi.org/10.1109/16.658826
https://doi.org/10.1109/16.658826
Autor:
Hisayuki Nishimura, Takashi Ipposhi, O. Tanina, Y. Inoue, S. Maeda, Shigeto Maegawa, Hirotada Kuriyama, T. Nishimura
Publikováno v:
IEEE Transactions on Electron Devices. 42:2117-2123
We propose a vertical /spl Phi/-shape transistor (V/spl Phi/T) cell for 1 Gbit DRAM and beyond. The V/spl Phi/T is a vertical MOSFET whose gate surrounds its channel region like a Greek-alphabetic letter /spl Phi/, fabricated through the penetration
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::97c85db912cb92109819bf6c7e4a61c7
https://doi.org/10.1109/16.477769
https://doi.org/10.1109/16.477769
Publikováno v:
IEEE Journal of Solid-State Circuits. 28:1114-1118
A single bitline cross-point cell activation (SCPA) architecture that reduces active power consumption and reduces the chip size of high-density SRAMs (static random access memories) is presented. The architecture enables the smallest column current
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dc74a1f29d1287ca718926a8dd7e9251
https://doi.org/10.1109/4.245590
https://doi.org/10.1109/4.245590
Autor:
Kenji Anami, K. Fujita, Hirotada Kuriyama, Y. Nishimura, Shuji Murakami, Tomohisa Wada, Toshihiko Hirose
Publikováno v:
IEEE Journal of Solid-State Circuits. 26:502-506
A new architecture for serial access memory is described that enables a static random access memory (SRAM) to operate in a serial access mode. The design target is to access all memory address serially from any starting address with an access time of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9671d040f088e7818eb806522d1a6ee5
https://doi.org/10.1109/4.75046
https://doi.org/10.1109/4.75046
Autor:
Hirotada Kuriyama, Kojiro Yuzuriha, Kazuhito Tsutsumi, Shuji Murakami, T. Mukai, Kenji Anami, Yoshio Kohno, Y. Nishimura, Toshihiko Hirose
Publikováno v:
IEEE Journal of Solid-State Circuits. 25:1068-1074
A 20-ns, 4-Mb CMOS SRAM with both 4 M*1 and 1M*4 organizations and fabricated using a quadruple-polysilicon, double-metal, twin-well 0.6- mu m CMOS process technology is described. A word-decoding architecture and a sensitive sense amplifier, combine
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d49f985dc0c0480ec9c72daab87daf82
https://doi.org/10.1109/4.62126
https://doi.org/10.1109/4.62126
Autor:
M. Ashida, Kazuhito Tsutsumi, Hirotada Kuriyama, H. Miyoshi, K. Anami, T. Okada, Y. Kohno, K. Yuzuriha, T. Nishimura, O. Sakamoto
Publikováno v:
1992 Symposium on VLSI Technology Digest of Technical Papers.
A compact SRAM memory cell structure using a set of C-TFTs (complementary thin-film transistors) is discussed. A C-TFT is composed of a top-gate N-channel TFT and a bottom-gate P-channel TFT. The proposed cell's size was reduced to 80% of that of a c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4264f4ac80ef46e24d1aaa15b8288968
https://doi.org/10.1109/vlsit.1992.200635
https://doi.org/10.1109/vlsit.1992.200635
Autor:
S. Maeda, Y. Fujii, Kazuhito Tsutsumi, Yoshiyuki Ishigaki, H. Miyoshi, Hirotada Kuriyama, Shigeto Maegawa, S. Miyamoto
Publikováno v:
International Electron Devices Meeting. Technical Digest.
We propose a novel single-bit-line SRAM cell called a Complementary-Switch (C-Switch) cell. This cell features a C-Switch which combines an n-channel bulk transistor and a p-channel TFT in parallel. Through the use of a single-bit-line architecture w
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cc9b1a2abd77780dc361f877ccd120de
https://doi.org/10.1109/iedm.1996.553584
https://doi.org/10.1109/iedm.1996.553584
Publikováno v:
Proceedings of 1994 VLSI Technology Symposium.
This paper presents a novel memory cell and process technology. The memory cell adopts the symmetry layout which has cornerless active area, a single bent word line and common gate TFTs. Furthermore, this memory cell realizes large cell ratio using a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f84b9f11aa3d0919b69f32f072564e5e
https://doi.org/10.1109/vlsit.1994.324434
https://doi.org/10.1109/vlsit.1994.324434
Autor:
Yoshio Kohno, Yoshiyuki Ishigaki, T. Hirose, Hirotada Kuriyama, J. Tsuchimoto, Hirokazu Miyoshi, A. Kinoshita, M. Ashida, Hiroki Honda, Shigeki Ohbayashi, S. Sakamori, H. Matsuo
Publikováno v:
Proceedings of 1994 VLSI Technology Symposium.
The nitride etch stop self align contact (NES-SAC) process, the single wafer type (SWT-CVD) process and the modified fabrication method of bipolar transistors suitable for low supply voltage, high performance BiCMOS SRAMs are presented. Using these t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::23ba06d93dce02f5bbb89a5d73e8c17a
https://doi.org/10.1109/vlsit.1994.324436
https://doi.org/10.1109/vlsit.1994.324436