Zobrazeno 1 - 3
of 3
pro vyhledávání: '"Hiraku Chakihara"'
Autor:
Masao Inoue, Hiraku Chakihara, Yuki Ota, Shuji Matsuo, Kentaro Saito, Takuya Hagiwara, Masazumi Matsuura, Seiji Muranaka
Publikováno v:
Journal of Photopolymer Science and Technology. 28:17-24
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ea40b33505e2c1bd1d32c746ebbb4eca
https://doi.org/10.2494/photopolymer.28.17
https://doi.org/10.2494/photopolymer.28.17
Autor:
Hiraku Chakihara, Kazuo Nakazato, Y. Nakatsuka, Hideyuki Matsuoka, S. Moriya, Akio Nishida, Masahiro Moniwa, Masamichi Matsuoka, Toshiyuki Kikuchi
Publikováno v:
IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
A new vertically stacked poly-Si MOSFET has been studied as a novel technique that enables device integration without applying advanced node process. Reduced cell area size of 1.21 /spl mu/m/sup 2/ has been achieved in 6T-SRAM which is 60% of 130 nm
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::908cf153b039c93a78016236eb28b797
https://doi.org/10.1109/iedm.2004.1419333
https://doi.org/10.1109/iedm.2004.1419333
Autor:
Masahiro Moniwa, A. Fujimoto, Masamichi Matsuoka, Kazuo Nakazato, Yasuhiko Takahashi, Hiraku Chakihara, Hideyuki Matsuoka, K. Okuyama, Toshiyuki Mine
Publikováno v:
Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..
Vertical transistors take up less area than conventional planar CMOS devices and are thus promising as a means for increased densities of integration. Most of the vertical MOSFET structures proposed so far, however, require sophisticated processing w
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8138127063a0c2f3fb94561ea6074404
https://doi.org/10.1109/vlsit.2004.1345498
https://doi.org/10.1109/vlsit.2004.1345498