Zobrazeno 1 - 10
of 114
pro vyhledávání: '"Hideo Sunami"'
Autor:
Hideo Sunami
Publikováno v:
Advances in Solid State Circuit Technologies
This chapter describes a trend in dimension increase in structures of semiconductor memories and transistors focusing on metal-oxide-semiconductor, MOS devices. One, two, and three-dimensional (3-D) structures correspond to a legacy of grown-junction
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6dc0e29a9a381e924bbaa42f82e0d268
http://www.intechopen.com/articles/show/title/dimension-increase-in-metal-oxide-semiconductor-memories-and-transistors
http://www.intechopen.com/articles/show/title/dimension-increase-in-metal-oxide-semiconductor-memories-and-transistors
Publikováno v:
Microelectronic Engineering. 88:213-217
A solid-gate-insulator-less field-effect transistor, named metal-gas-semiconductor FET, MGSFET is proposed. This is aimed to avoid possible failures such as dielectric breakdown of the gate due to the gate insulator. A fundamental process sequence an
Publikováno v:
Japanese Journal of Applied Physics. 47:2906-2909
A novel silicon optical modulator, originally based on inversion-carrier absorption, with a metal–oxide–semiconductor capacitor structure has been proposed and successfully developed. In this report, we will describe experimental results for a mo
Publikováno v:
Microelectronic Engineering. 84:1631-1634
An application of arsenic plasma doping for source and drain formation in three-dimensional (3-D) MOS transistor is proposed in terms of fundamental transistor performance aiming uniform doping over entire silicon beam surface. Preliminary results sh
Publikováno v:
Japanese Journal of Applied Physics. 46:2050-2053
A silicon-on-insulator (SOI) n-type metal–oxide–semiconductor (MOS) transistor with additional side gate electrodes is fabricated and its subthreshold characteristics are discussed. Since its device structure provides independent biasing to gates
Publikováno v:
Japanese Journal of Applied Physics. 45:3498-3503
A microscopic optical waveguide fabrication technique on silicon substrates at low temperatures using a fluorinated polyimide (FPI) is developed for application in an optically interconnected LSI. Propagation loss decreases to about 1.0 dB/cm in the
Publikováno v:
Sensors and Actuators A: Physical. 111:310-316
Along with continuous scaling of MOS devices on LSI’s since early 1970s, it is widely recognized that three-dimensional (3-D) transistor structures will increasingly be important to extend further scaling in future. In response to the requirement,
Autor:
Shin Yokoyama, Hideo Sunami, Quazi D. M. Khosru, Kentaro Shibahara, Takamaro Kikkawa, Takenobu Yoshino, Anri Nakajima
Publikováno v:
Japanese Journal of Applied Physics. 42:L1429-L1432
The influence of organic contaminants on process-induced interface trap generation and oxide reliability has been investigated using n-type metal oxide semiconductor field-effect transistors (MOSFETs) and capacitors. It has been observed that adsorpt
Publikováno v:
Japanese Journal of Applied Physics. 42:2067-2072
In this study, a three-dimensional (3-D) transistor with 1-µm-high multi-beams is proposed. This is named corrugated-channel transistor (CCT) after its "corrugated structure of channels". To realize the corrugated structure, an orientation dependent
Autor:
Hideo Sunami
Publikováno v:
Kobunshi. 52:546-550