Zobrazeno 1 - 10
of 20
pro vyhledávání: '"Hidekatsu Onose"'
Publikováno v:
IEEE Transactions on Electron Devices. 67:2850-2853
An edge termination structure with enhanced field-limiting rings (enhanced FLRs) is proposed to stabilize the breakdown voltage against the surface charge. The pitches of the enhanced rings are designed to mitigate the electric field and expand the d
Publikováno v:
Solid-State Electronics. 129:200-205
The effect of the p gate dose on the characteristics of the gate-source diode in SiC static induction transistors (SIT) was investigated. It was found that a dose of 1.5 × 1014 cm−2 yields a pn junction breakdown voltage higher than 60 V and good
Autor:
Hiroshi Miki, Kan Yasui, Takashi Hirao, Yoshiaki Toyota, Mutsuhiro Mori, Hiroyuki Okino, Jiro Hasegawa, Kazuhiro Mochizuki, Norifumi Kameshiro, Tetsuo Oda, Hiroyuki Matsuhima, Hidekatsu Onose, Renichi Yamada, Natsuki Yokoyama
Publikováno v:
Materials Science Forum. 858:1091-1094
A 3.3-kV SiC-Si hybrid module, composed of a low-forward-voltage (VF) SiC junction-barrier-Schottky (JBS) diode and a low-saturation-voltage VCE(sat) Si trench IGBT was fabricated and demonstrated highly efficient operation.
Publikováno v:
ECS Journal of Solid State Science and Technology. 5:Q271-Q273
A graded junction termination extension (JTE) is proposed to suppress the variation of avalanche voltages for SiC power devices. A 7-zone JTE was investigated to realize the concept of the graded JTE. Avalanche voltages higher than 3,880 V were expec
Publikováno v:
Materials Science Forum. :1127-1130
We developed a JBS diode with characteristics of a low forward voltage and a low leakage current at 3kV. Further, we built a prototype of a 3kV/200A hybrid module, equipped with Si-IGBTs and SiC-JBS diodes. We attempted to decrease the recovery loss,
Publikováno v:
IEEE Transactions on Electron Devices. 56:992-997
Forward current density (JF)-forward voltage (VF) characteristics are experimentally and computationally investigated for 4H-silicon carbide junction barrier Schottky (JBS) diodes with a lightly doped (3 - 5 times1015 cm-3) drift layer and 2-mum-wide
Publikováno v:
Materials Science Forum. :1059-1062
We developed normally-off 4H-SiC vertical junction field effect transistors (JFETs) with large current density. The effect of forming an abrupt junction between the gate and the channel was simulated, and vertical JFETs were then fabricated with abru
Autor:
Hidekatsu Onose, Kazuhiro Mochizuki
Publikováno v:
Materials Science Forum. :607-610
We demonstrate a Dual-Pearson approach to model ion-implanted Al concentration profiles in 4H-SiC for high-precision design of high-voltage power devices. Based on the Monte Carlo simulated data for 35-400 keV implantation, we determine the nine Dual
Publikováno v:
IEEE Transactions on Electron Devices. 55:1997-2003
This paper presents a detailed analysis and precise modeling of multiple-energy Al implantations necessary for boxlike profiles in the p+-region of 4H-SiC power devices. To demonstrate the balance between "scatter-in channeling" and "amorphization-su
Publikováno v:
Materials Science Forum. :1227-1230