Zobrazeno 1 - 10
of 35
pro vyhledávání: '"Hidehiro Takata"'
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 23:2347-2351
The direct radio frequency power injection (DPI) method was extended using on-chip voltage waveform monitoring and built-in self-test techniques. Static random access memory (SRAM) has been chosen as a demonstrator of the extended DPI method and exhi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::18f2cbd040aff4944d2e2579702ecda7
https://doi.org/10.1109/tvlsi.2014.2361208
https://doi.org/10.1109/tvlsi.2014.2361208
Autor:
Hiroshi Fuketa, Tadashi Yasufuku, M. Nomura, Ryo Takahashi, Makoto Takamiya, Takayasu Sakurai, Hirofumi Shinohara, Hidehiro Takata
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 59:918-921
Temperature dependence of 256 within-die random gate delay variations in sub-threshold logic circuits is measured in 40-nm CMOS test chips. When the temperature is reduced from 25 °C to -40°C, the sigma/average (σ/μ) of the gate delay at 0.3 V in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::487a8073b0bb77c5da2a8b337c6ccfac
https://doi.org/10.1109/tcsii.2012.2231038
https://doi.org/10.1109/tcsii.2012.2231038
Publikováno v:
IEICE Transactions on Electronics. :586-593
The susceptibility of a static random access memory (SRAM) core against static and dynamic variation of power supply voltage is evaluated, by using on-chip diagnosis structures of memory built-in self testing (MBIST) and on-chip voltage waveform moni
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4da7639673354f521a8f9cc8a2c7b9a3
https://doi.org/10.1587/transele.e95.c.586
https://doi.org/10.1587/transele.e95.c.586
Autor:
Koichiro Ishibashi, Hidehiro Takata, Makoto Ikeda, Kunihiro Asada, Toru Nakura, Jinmyoung Kim
Publikováno v:
IEICE Transactions on Electronics. :643-650
Switched parasitic capacitors of sleep blocks with a tri-mode power gating structure are implemented to reduce on-chip resonant supply noise in 1.2V, 65nm standard CMOS process. The tri-mode power gating structure makes it possible to store charge in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::03113223f23891475d10bcaa7a5858df
https://doi.org/10.1587/transele.e95.c.643
https://doi.org/10.1587/transele.e95.c.643
Autor:
Toru Nakura, Hidehiro Takata, Koichiro Ishibashi, Makoto Ikeda, Kunihiro Asada, Jinmyoung Kim
Publikováno v:
IEICE Transactions on Electronics. :511-519
This paper presents an on-chip resonant supply noise canceller utilizing parasitic capacitance of sleep blocks. The test chip was fabricated in a 0.18µm CMOS process and measurement results show 43.3% and 12.5% supply noise reduction on the abrupt s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::384c0a09544e20b14967ddfa717f157a
https://doi.org/10.1587/transele.e94.c.511
https://doi.org/10.1587/transele.e94.c.511
Autor:
Hidehiro Takata, Rei Akiyama, Tadao Yamanaka, Masanori Kurimoto, Haruyuki Ohkuma, Hirofumi Shinohara, Hiroaki Suzuki
Publikováno v:
ACM Transactions on Design Automation of Electronic Systems. 15:1-17
For Dynamic Voltage Scaling (DVS), we propose a novel design methodology. This methodology is composed of an error detection circuit and three technologies to reduce the area and power penalties which are the large issues for the conventional DVS wit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c6d7780c4703b320f176a9399d71b3a8
https://doi.org/10.1145/1698759.1698767
https://doi.org/10.1145/1698759.1698767
Publikováno v:
IEICE Transactions on Electronics. :475-482
Logical operations in CMOS digital integration are highly prone to fail as the amount of power supply (PS) drop approaches to failure threshold. PS voltage variation is characterized by built-in noise monitors in a 32-bit microprocessor of 90-nm CMOS
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::358ad892bc60fda2829c128b16606211
https://doi.org/10.1587/transele.e92.c.475
https://doi.org/10.1587/transele.e92.c.475
Publikováno v:
IEICE Transactions on Electronics. :657-665
Many embedded system application in ubiquitous network strongly require the high performance SoC with overcoming the physical limitations in the advanced CMOS. To develop these SoC, the continuous design efforts have been done. The initial efforts ar
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7fbab72a318619a98ba426c5a75f3768
https://doi.org/10.1093/ietele/e90-c.4.657
https://doi.org/10.1093/ietele/e90-c.4.657
Autor:
K. Hayase, S. Nakazawa, Katsunori Sawai, T. Itou, S. Nakano, S. Kaneko, N. Ishikawa, Kouichi Ishimi, S. Ohtani, T. Higuchi, M. Sakugawa, N. Masui, Yukari Takata, Osamu Tomisawa, K. Sakamoto, Hiroyuki Kondo, T. Shimizu, S. Iwata, M. Nakajima, Hidehiro Takata, Naoto Okumura, Mitsugu Satou
Publikováno v:
IEEE Journal of Solid-State Circuits. 39:184-193
A 600-MHz single-chip multiprocessor, which includes two M32R 32-bit CPU cores , a 512-kB shared SRAM and an internal shared pipelined bus, was fabricated using a 0.15-/spl mu/m CMOS process for embedded systems. This multiprocessor is based on symme
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c87696cfaf2da81c0141c6e96f0a3946
https://doi.org/10.1109/jssc.2003.820866
https://doi.org/10.1109/jssc.2003.820866
Autor:
K. Tsuchihashi, H. Sato, A. Yamada, Y. Shimotsuma, Y. Yoshida, Hidehiro Takata, K. Nakakimura, M. Hashizume, Atsushi Mohri
Publikováno v:
IEEE Journal of Solid-State Circuits. 34:992-1000
A real-time system large-scale-integrated circuit (LSI) for digital video cassette recorder (DVCR) encoding/decoding and MPEG-2 decoding is implemented on a dual-issue RISC processor (DRISC) with dedicated hardware optimized for video-block processin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::187eb29e00dff95c29ed0383b1ac0a4c
https://doi.org/10.1109/4.772415
https://doi.org/10.1109/4.772415