Zobrazeno 1 - 10
of 20
pro vyhledávání: '"Hideaki Aochi"'
Autor:
Hidenori Miyagawa, Haruka Kusai, Riichiro Takaishi, Tomoya Kawai, Yuuichi Kamimuta, Toshiya Murakami, Keiko Ariyoshi, Takanori Asano, Masakazu Goto, Makoto Fujiwara, Yuichiro Mitani, Tomoyuki Obu, Hideaki Aochi
Publikováno v:
Extended Abstracts of the 2020 International Conference on Solid State Devices and Materials.
Autor:
Hidenori Miyagawa, Toshiya Murakami, Tomoya Kawai, Riichiro Takaishi, Masakazu Goto, Hideaki Aochi, Haruka Kusai, Yuuichi Kamimuta, Tomoyuki Obu, Takanori Asano, Keiko Ariyoshi, Makoto Fujiwara, Yuichiro Mitani
Publikováno v:
2019 IEEE International Electron Devices Meeting (IEDM).
In order to improve the channel conductance of 3D flash memory cell, metal-assisted solid-phase single crystallization process has been demonstrated for the first time. Metal induced lateral crystallization (MILC) process is well-known for the thin f
Autor:
Akihiro Nitayama, Hideaki Aochi
Publikováno v:
2013 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA).
We proposed Bit Cost Scalable (BiCS) technology in 2007 as a three-dimensional memory for the future ultra high density storage devices, which extremely reduce the bit costs by vertically stacking memory arrays with punch and plug process. We've appl
Autor:
James Gardner Ryan, Naohiro Shoda, Tomio Katata, Stephen Bruce Brodsky, Hideaki Aochi, Makoto Honda
Publikováno v:
MRS Bulletin. 20:42-45
Collimated sputtering is a physical vapor deposition (PVD) method where a collimator is inserted between a conventional “full-face-erosion” sputtering target and a substrate (Figure 1). The collimator is a plate of hexagonal cells that acts as a
Autor:
Hideaki Aochi, Akihiro Nitayama
Publikováno v:
Proceedings of 2010 International Symposium on VLSI Technology, System and Application.
We've developed Bit Cost Scalable (BiCS) flash technology as a three-dimensional memory for the future ultra high density storage devices, which extremely reduces the chip costs by vertically stacking memory arrays with punch and plug process. We've
Autor:
Yoshihisa Iwata, Ryota Katsumata, Takashi Maeda, Yoshimasa Mikajiri, Hideaki Aochi, Y. Nagata, Ryouhei Kirisawa, Masaru Kito, Makoto Honda, M. Kido, Yosuke Komori, Shigeto Oota, Megumi Ishiduki, Akihiro Nitayama, Yoshiaki Fukuzumi, Tomoko Fujiwara, Hiroyasu Tanaka
Publikováno v:
2009 IEEE International Electron Devices Meeting (IEDM).
An asymmetric source/drain profile for select gate and metal salicided control gate are successfully realized on Pipe-shaped Bit Cost Scalable (P-BiCS) Flash memory to achieve data storage device with excellent performance and reliability.
Autor:
Hideaki Aochi
Publikováno v:
2009 IEEE International Memory Workshop.
In this presentation, recent reports on three dimensional non-volatile memories are reviewed and their pros and cons are discussed. BiCS (Bit Cost Scalable) flash technology is focused as one of the most promising candidates for the future ultra high
Autor:
Ryota Katsumata, Yosuke Komori, Y. Nagata, Megumi Ishiduki, Masaru Kito, Hideaki Aochi, Hiroyasu Tanaka, Akihiro Nitayama, Yoshiaki Fukuzumi, M. Kido
Publikováno v:
2008 IEEE International Electron Devices Meeting.
Program and erase operation on NAND-string of Bit-Cost Scalable (BiCS) flash memory has been successfully achieved. High boost efficiency of floating pillars and ONON (block oxide/charge SiN/tunnel oxide/tunnel SiN) structure as a memory film stack i
Autor:
Hideaki Aochi, Adrian M. Ionescu
Publikováno v:
2008 IEEE International Electron Devices Meeting.
This session presents recent advances in 1T DRAM, standard DRAM and NOR flash memory. The 1st Paper by Ki-Whan Song et al., from Samsung demonstrates aggressively scaled 55 nm capacitor-less 1T DRAM cell transistor with non-overlap source and drain.
Autor:
Hideaki Aochi, Yoshihisa Iwata, Ryota Katsumata, Y. Nagata, Hiroyasu Tanaka, Akihiro Nitayama, M. Kido, Yasuyuki Matsuoka, Yoshiaki Fukuzumi, Masaru Kito, Yosuke Komori, Megumi Ishiduki
Publikováno v:
Extended Abstracts of the 2008 International Conference on Solid State Devices and Materials.