Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Hickerson, Bryan"'
Publikováno v:
DAC
Understanding the relationship between coverage and test-templates (a generic term we use to describe the inputs for the random stimuli generator) is an important layer in understanding the state and progress of the verification process. Today, this
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::416ee7eaa07185bbe3b8bfb4f9f5b2cf
https://doi.org/10.1145/3061639.3062324
https://doi.org/10.1145/3061639.3062324
Publikováno v:
DAC
This paper addresses the challenges of minimizing the time and resources required to validate the changes between two Hardware (HW) model iterations of the same design. It introduces CLTV (Coverage Learned Targeted Validation), an automatic framework
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9c3e6bc2e2ec67e9d4ab0b94961fdf2b
https://doi.org/10.1145/2593069.2593114
https://doi.org/10.1145/2593069.2593114
Autor:
Charles Meissner, Wisam Kadry, Randall R. Pratt, Anatoly Koyfman, Thompto Brian W, Brett Adam St. Onge, Daniel Hershcovich, Mike Schiffli, Avi Ziv, Allon Adir, Elena Tsanko, Oz Hershkovitz, Karen Holtz, Hickerson Bryan G, John M. Ludden, Dave Goodman, Amir Nahir
Publikováno v:
DAC
Transactional memory is a promising mechanism for synchronizing concurrent programs that eliminates locks at the expense of hardware complexity. Transactional memory is a hard feature to verify. First, transactions comprise several instructions that
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::83367d24d46b0d17df001011d7c0a168
https://doi.org/10.1145/2593069.2593241
https://doi.org/10.1145/2593069.2593241
Publikováno v:
DAC: Annual ACM/IEEE Design Automation Conference; 2017, Issue 54, p415-420, 6p
Publikováno v:
Hardware and Software: Verification and Testing ISBN: 9783642195822
Haifa Verification Conference
Haifa Verification Conference
Many modern microprocessor architectures utilize simultaneous multithreading (SMT) for increased performance. This trend is exemplified in IBM's Power series of high-end microprocessors which steadily increased the number of threads in a system in it
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::06e56517d790ffd6e6900de6cc82be35
https://doi.org/10.1007/978-3-642-19583-9_15
https://doi.org/10.1007/978-3-642-19583-9_15
Publikováno v:
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE); 2015, p79-84, 6p
Autor:
Adir, Allon, Goodman, Dave, Hershcovich, Daniel, Hershkovitz, Oz, Hickerson, Bryan, Holtz, Karen, Kadry, Wisam, Koyfman, Anatoly, Ludden, John, Meissner, Charles, Nahir, Amir, Pratt, Randall R., Schiffli, Mike, St. Onge, Brett, Thompto, Brian, Tsanko, Elena, Ziv, Avi
Publikováno v:
Proceedings of the the 51st Annual Design Automation Conference Design Automation Conference; 6/1/2014, p1-6, 6p
Publikováno v:
Proceedings of the the 51st Annual Design Automation Conference Design Automation Conference; 6/1/2014, p1-6, 6p