Zobrazeno 1 - 4
of 4
pro vyhledávání: '"Hesham Almatary"'
Autor:
Hesham Almatary
Embedded system designers are facing an inexorable pressure to add more features and leverage connectivity. This creates potential attack vectors in areas that were not subject to security concerns before. Individuals’ privacy could be violated, ca
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5dd0667d6597ea7450473f1ada2aeb5d
Autor:
Robert N. M. Watson, Peter G. Neumann, Jonathan Woodruff, Michael Roe, Hesham Almatary, Jonathan Anderson, John Baldwin, Graeme Barnes, David Chisnall, Jessica Clarke, Brooks Davis, Lee Eisen, Nathaniel Wesley Filardo, Richard Grisenthwaite, Alexandre Joannou, Ben Laurie, A. Theodore Markettos, Simon W. Moore, Steven J. Murdoch, Kyndylan Nienhuis, Robert Norton, Alexander Richardson, Peter Rugg, Peter Sewell, Stacey Son, Hongyan Xia
This technical report describes CHERI ISAv8, the eighth version of the CHERI architecture being developed by SRI International and the University of Cambridge. This design captures ten years of research, development, experimentation, refinement, form
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1f5b2e44e3ab9cca15f234ee537f453d
Autor:
Robert N. M. Watson, Peter G. Neumann, Jonathan Woodruff, Michael Roe, Hesham Almatary, Jonathan Anderson, John Baldwin, David Chisnall, Brooks Davis, Nathaniel Wesley Filardo, Alexandre Joannou, Ben Laurie, A. Theodore Markettos, Simon W. Moore, Steven J. Murdoch, Kyndylan Nienhuis, Robert Norton, Alex Richardson, Peter Rugg, Peter Sewell, Stacey Son, Hongyan Xia
This technical report describes CHERI ISAv7, the seventh version of the Capability Hardware Enhanced RISC Instructions (CHERI) Instruction-Set Architecture (ISA) being developed by SRI International and the University of Cambridge. This design captur
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d5e58ff1ab5227b612ba7ee3a0b087fd
Publikováno v:
EuroSys
Mixed-criticality systems (MCS) combine real-time components of different levels of criticality - i.e. severity of failure - on the same processor, in order to obtain good resource utilisation. They must be able to guarantee deadlines of highly-criti
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::acac441bb774d8fcb79c0d4df3dbd8e9
https://doi.org/10.1145/3190508.3190539
https://doi.org/10.1145/3190508.3190539
