Zobrazeno 1 - 10
of 25
pro vyhledávání: '"Herbert L. Ho"'
Autor:
Alberto Cestero, Gregory J. Fredeman, Toshiaki Kirihata, Janakiraman Viraraghavan, Abraham Mathews, Babar A. Khan, Subramanian S. Iyer, Daniel J. Rainey, Chris Paone, Donald W. Plass, Thomas R. Miller, Michael A. Sperling, Herbert L. Ho, Norbert Arnold, Elizabeth L. Gerhard, Rajesh R. Tummuru, Dinesh Kannambadi, Michael Whalen, Steven Burns, Kenneth J. Reyer, Dongho Lee, Thomas J. Knips
Publikováno v:
IEEE Journal of Solid-State Circuits. 51:230-239
A 1.1 Mb embedded DRAM macro (eDRAM), for next-generation IBM SOI processors, employs 14 nm FinFET logic technology with $\hbox{0.0174}~\mu\hbox{m}^{2}$ deep-trench capacitor cell. A Gated-feedback sense amplifier enables a high voltage gain of a pow
Autor:
Xiaohu Tang, Herbert L. Ho, Brian Yueh-Ling Hsieh, K. Stein, Shuen-Cheng Chris Lei, Oliver D. Patterson, Surbhi Mittal, Richard F. Hafer, William Davies, Ankur Arya
Publikováno v:
2016 27th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC).
An E-beam voltage contrast inspection methodology involving multiple inspection points has been created to support development of the EDRAM module for a recent FINFET technology. This methodology provides within-sector feedback for a wide range of de
Autor:
E. Engbrecht, Edward P. Maciejewski, Christopher D. Sheraw, R. Divakaruni, Zhengwen Li, Allen H. Gabor, L. Economikos, Fernando Guarin, N. Zhan, H-K Lee, MaryJane Brodsky, Kenneth J. Stein, Siyuranga O. Koswatta, Y. Yang, Byeong Y. Kim, J. Hong, A. Bryant, Herbert L. Ho, Ruqiang Bao, Nicolas Breil, Babar A. Khan, E. Woodard, W-H. Lee, C-H. Lin, A. Levesque, Kevin McStay, V. Basker, Viraj Y. Sardesai, C. Tran, A. Ogino, Reinaldo A. Vega, C. DeWan, Shreesh Narasimha, J-J. An, Amit Kumar, A. Aiyar, Ravikumar Ramachandran, W. Wang, X. Wang, W. Nicoll, D. Hoyos, A. Friedman, Barry Linder, Yongan Xu, E. Alptekin, Cathryn Christiansen, S. Polvino, Han Wang, Scott R. Stiffler, G. Northrop, S. Saudari, J. Rice, Saraf Iqbal Rashid, Sunfei Fang, Michael V. Aquilino, Z. Ren, B. Kannan, Geng Wang, Noah Zamdmer, T. Kwon, Paul D. Agnello, Hasan M. Nayfeh, S. Jain, Robert R. Robison, M. Hasanuzzaman, J. Cai, L. Lanzerotti, D. Wehelle-Gamage, Basanth Jagannathan, J. Johnson, E. Kaste, Kai Zhao, Huiling Shang, Carl J. Radens, Shariq Siddiqui, Y. Ke, D. Ferrer, Ximeng Guan, D. Conklin, K. Boyd, K. Henson, Siddarth A. Krishnan, Bernard A. Engel, H. Dong, S. Mahajan, Unoh Kwon, Dominic J. Schepis, William Y. Chang, Liyang Song, Brian J. Greene, Chengwen Pei, S.-J. Jeng, Clevenger Leigh Anne H, Vijay Narayanan, C. Zhu, Wai-kin Li, Henry K. Utomo, Wei Liu, Dureseti Chidambarrao
Publikováno v:
2014 IEEE International Electron Devices Meeting.
We present a fully integrated 14nm CMOS technology featuring finFET architecture on an SOI substrate for a diverse set of SoC applications including HP server microprocessors and LP ASICs. This SOI finFET architecture is integrated with a 4th generat
Autor:
Hani Herbert L. Ho, Joseph Leandro B. Peje, Floro Barot, Maria Fe G. Bautista, John Richard E. Hizon, Carl Christian E. Misagal, Louis P. Alarcon
Publikováno v:
TENCON 2014 - 2014 IEEE Region 10 Conference.
In this paper, the design of an ultra-low voltage standard cell library is discussed. This includes the design constraints in designing each gate on a schematic level as well as techniques used in designing the layout. The method of performing timing
Publikováno v:
Journal of Materials Research. 11:904-911
The formation processes of epitaxial nickel silicides, resulting from the interaction of nickel silicide films (10 nm–100 nm) on (111) silicon (Si) substrates after furnace annealing, have been studied using transmission electron microscopy (TEM) a
Autor:
Rajeev Malik, Rishikesh Krishnan, Sunfei Fang, Bernhard Wunder, Kevin McStay, Yanli Zhang, Sadanand V. Deshpande, Douglas Daley, Herbert L. Ho, Sneha Gupta, Paul C. Parries, Balaji Jayaraman, Sungjae Lee, Puneet Goyal, John E. Barth, Scott R. Stiffler, Paul D. Agnello, Subramanian S. Iyer
Publikováno v:
ICICDT
In this paper, we present a systematic performance study and modeling of on-chip deep trench (DT) decoupling capacitors for high-performance SOI microprocessors. Based on system-level simulations, it is shown that the DT decoupling capacitors (decap)
Publikováno v:
Journal of Materials Research. 8:2354-2361
The interaction of cobalt (Co) and low-pressure chemical-vapor-deposited silicon nitride (LPCVD Si3N4) during anneals from 200 °C−1000 °C in vacuum, Ar, and Ar–H2 ambient (95% Ar and 5% H2) has been studied. After the anneals, reduction of Si3N
Publikováno v:
Journal of Materials Research. 8:467-472
Cobalt (Co)/silicon dioxide (SiO2) reactions during rapid thermal annealing (RTA) in an N2 ambient have been investigated. Scanning electron microscopy (SEM) and transmission electron microscopy (TEM) show that islands consisting of Co and the cobalt
Autor:
Herbert L. Ho, Jinping Liu, Paul C. Parries, Norman Robson, Jing Li, Puneet Goyal, S.S. Iyer, Ming Yin, Babar A. Khan, Zhengwen Li, Paul D. Agnello, K. V. Hawkins, Sunfei Fang, T. Weaver, Scott R. Stiffler, Kevin McStay, Rishikesh Krishnan, W. Davies, R. Takalkar, T. Kirihata, Sami Rosenblatt, S. Galis, A. Blauberg, Shreesh Narasimha, Michael P. Chudzik, Amanda L. Tessier, William K. Henson, W. Kong, Edward P. Maciejewski, Alberto Cestero, Nauman Zafar Butt, Joseph Ervin, S. Gupta, Jeyaraj Antony Johnson, S. Rombawa, Sungjae Lee, J. Barth, Ying Zhang
Publikováno v:
2010 International Electron Devices Meeting.
We present industry's smallest eDRAM cell and the densest embedded memory integrated into the highest performance 32nm High-K Metal Gate (HKMG) SOI based logic technology. The cell is aggressively scaled at 58% (vs. 45nm) and features the key innovat
Autor:
Russell H. Arndt, Ashima B. Chakravarti, Anthony G. Domenicucci, Amanda L. Tessier, Jinping Liu, Sunfei Fang, Kevin McStay, Zhengwen Li, Randolph F. Knarr, S. Lee, Joseph F. Shepard, Herbert L. Ho, A. Arya, R. Venigalla, W. Davies, R. Takalkar, Rishikesh Krishnan, Paul C. Parries, B. Morgenfeld, Xin Li, S. Gupta, Michael P. Chudzik, Scott R. Stiffler, Puneet Goyal, Babar A. Khan, Sadanand V. Deshpande, J. Dadson, Scott D. Allen
Publikováno v:
2010 IEEE International SOI Conference (SOI).
In this paper, we describe the unique scaling challenges, critical sources of variation, and the potential trench leakage mechanisms of 32nm trench capacitors that utilize high-к/metal electrode materials. This is the first eDRAM technology that has