Zobrazeno 1 - 10
of 31
pro vyhledávání: '"Henri Fraisse"'
Publikováno v:
SSRN
We measure the impact of bank capital requirements on corporate borrowing and expansion. We use French loan-level data and take advantage of the transition from Basel I to Basel II. While under Basel I the capital charge was the same for all firms, u
Autor:
Henri Fraisse, Matthias Laporte
Publikováno v:
Journal of Banking & Finance. 138:106401
Autor:
Henri Fraisse, Matthias Laporte
Publikováno v:
SSRN Electronic Journal.
Taking advantage of granular data we measure the change in bank capital requirement resulting from the implementation of AI techniques to predict corporate defaults. For each of the largest banks operating in France we design an algorithm to build ps
Autor:
Lisa Liu, Henri Fraisse, Mansimran Benipal, Hossein Omidian, Abhishek Kumar Jain, Dinesh D. Gaitonde
Publikováno v:
FPL
FPGAs allow custom memory hierarchy and flexible data movement with highly fine-grained control. These capabilities are critical for building high performance and energy efficient domain-specific architectures (DSAs), especially for workloads with ir
Publikováno v:
SSRN Electronic Journal.
Starting in 2014 with the implementation of the European Commission Capital Requirement Directive, banks operating in the Euro area were benefiting from a 25% reduction (the Supporting Factor or "SF" hereafter) in their own funds requirements against
Publikováno v:
Journal of the European Economic Association. 17:1070-1106
We exploit the Eurosystem’s longer-term refinancing operations (LTROs) of 2011–2012 to assess whether a large provision of central bank liquidity to banks during a financial crisis has a positive impact on banks’ credit supply to firms. We cont
Autor:
Henri Fraisse
Publikováno v:
The Journal of Law, Economics, and Organization. 33:686-717
When facing financial distress, French households can file a case to a “households’ over-indebtedness commission” (HDC). The HDC can order an immediate repayment or grant a debt suspension. Exploiting the random assignment of bankruptcy filings
Publikováno v:
FPT
2.5D stacking technology allows us to build high performance and high capacity FPGA devices at reasonable costs. The communication between multiple dies happen on a passive silicon interposer at high speed, which pose several interesting challenges.
Autor:
Dinesh D. Gaitonde, Henri Fraisse
Publikováno v:
FPL
Many FPGA designs contain soft IP tightly connected to hard blocks such as on-chip Processor, PCIE or IOs. Generally, these soft IPs pose significant timing closure challenges. In this paper, we propose a timing-driven Place and Route flow based on B
Publikováno v:
Économie & prévision. :101-120