Zobrazeno 1 - 10
of 21
pro vyhledávání: '"Henny Volders"'
Autor:
Gerald Beyer, Cor Claeys, Larry Zhao, Christopher J. Wilson, Henny Volders, Mikhail R. Baklanov, Marianna Pantouvaki, Zsolt Tőkei, Els Van Besien
Publikováno v:
Microelectronic Engineering. 88:3030-3034
A unique test structure based on a metal–insulator–semiconductor planar capacitor (Pcap) design was used to investigate several aspects of metal barrier-induced low-k damage. A special term called Effective Damage Thickness was introduced to desc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::69c8ef81c3a3fc0b4fb66848b669ec61
https://doi.org/10.1016/j.mee.2011.05.002
https://doi.org/10.1016/j.mee.2011.05.002
Autor:
Chao Zhao, Zsolt Tkei, Gerald Beyer, Christopher J. Wilson, Henny Volders, Kristof Croes, Larry Zhao
Publikováno v:
Microelectronic Engineering. 88:656-660
X-ray diffraction is used to assess the texture of narrow lines and study the impact of different sidewall diffusion barrier materials. All the Ta-based barriers developed a strong texture in the scaled geometry, with little effect from sidewall grow
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ef1f4811d232dbfa919ad004dbd2164c
https://doi.org/10.1016/j.mee.2010.06.014
https://doi.org/10.1016/j.mee.2010.06.014
Autor:
Virginie Gravey, B. Parmentier, Erik Sleeckx, Nancy Heylen, A. Cockburn, J. Steenbergen, G. Faelens, Thierry Conard, M. Van De Peer, L. Carbonell, Koen Marrant, Zs. Tkei, Gerald Beyer, Henny Volders, Christopher J. Wilson, Kavita Shah, Chao Zhao, Kristof Kellens
Publikováno v:
Microelectronic Engineering. 88:690-693
Thin (
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::851480646904e9ac819a5d54e70a68eb
https://doi.org/10.1016/j.mee.2010.09.003
https://doi.org/10.1016/j.mee.2010.09.003
Autor:
Gerald Beyer, Zaid El-Mekki, Philippe M. Vereecken, Wouter Ruythooren, Aleksandar Radisic, Henny Volders, Zsolt Tokei, Silvia Armini
Publikováno v:
Microelectronic Engineering. 88:754-759
The 300mm wafer copper electrochemical deposition (ECD) process for dual damascene metallization of semiconductor advanced interconnects is critically reviewed and the breakthroughs that enable further scaling of this process are examined. Special em
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::10774a12ccaa768ac01684f739a699b7
https://doi.org/10.1016/j.mee.2010.08.013
https://doi.org/10.1016/j.mee.2010.08.013
Autor:
Christopher J. Wilson, Zsolt Tkei, Henny Volders, Gerald Beyer, Anthony O'Neill, Kristof Croes, Alton B. Horsfall, Marianna Pantouvaki
Publikováno v:
Microelectronic Engineering. 87:398-401
An in situ study of self-forming barriers from a Cu-Mn alloy was performed to investigate the barrier growth using X-ray diffraction on damascene lines. The associated evolution in interconnect texture and Cu stress was also observed. The shift in Cu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b2acf2cf98ec7bfd9a16fbfb88780719
https://doi.org/10.1016/j.mee.2009.06.023
https://doi.org/10.1016/j.mee.2009.06.023
Autor:
Magi Margalit Nagar, Silvia Armini, Philippe M. Vereecken, Wouter Ruythooren, Katrien Strubbe, Aleksandar Radisic, Zaid El-Mekki, Henny Volders
Publikováno v:
ECS Transactions. 25:175-184
We have studied electrochemical deposition of copper on ruthenium-tantalum (Ru-Ta) alloy, tantalum (Ta), and cobalt (Co) substrates using cyclic voltammetry and galvanostatic methods. We show that a single-step direct-plating from acidic Cu bath appr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ca8192ff0c9d9e5717c4a228a218196b
https://doi.org/10.1149/1.3318516
https://doi.org/10.1149/1.3318516
Autor:
Youssef Travaly, O. Richard, E. VanBesien, Gerald Beyer, Romano Hoofman, Roel Daamen, Marianna Pantouvaki, Henny Volders, M. Willegems, Elisabeth Camerotto, Aurelie Humbert, Kristof Kellens
Publikováno v:
Microelectronic Engineering. 85:2071-2074
A sacrificial material deposited by CVD is used to demonstrate air gap formation in single damascene structures by UV-assisted decomposition. The material is removed through a porous low-k cap, after completion of the damascene scheme. The porosity o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7a122b6badf3fd312ad226b4f025a7ba
https://doi.org/10.1016/j.mee.2008.05.020
https://doi.org/10.1016/j.mee.2008.05.020
Autor:
Alexis Franquet, S. Garaud, Guy Vereecke, F. Sinapi, Thierry Conard, Youssef Travaly, I. Hoflijk, Bert Brijs, Chao Zhao, Henny Volders, Zsolt Tokei, Hugo Bender, Chris Drijbooms, Wei-Min Li, D. Vanhaeren, H. Sprey, Alain M. Jonas, Rudy Caluwaerts, L. Carbonell, Alain Moussa
Publikováno v:
Microelectronic Engineering. 84:2460-2465
A ternary WN"xC"y system was deposited in a thermal ALD (atomic layer deposition) reactor from ASM at 300^oC in a process sequence using tungsten hexafluoride (WF"6), triethyl borane (TEB) and ammonia (NH"3) as precursors. The WC"x layers were deposi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5f9ce21c9de7693605db1d66e1e00413
https://doi.org/10.1016/j.mee.2007.05.023
https://doi.org/10.1016/j.mee.2007.05.023
Autor:
Stefan Kubicek, Serge Biesemans, K. De Meyer, J. Petry, Henny Volders, Abdelkarim Mercha, Barry O'Sullivan, R. Singanamalla, Vasile Paraschiv, Hao Yu
Publikováno v:
Microelectronic Engineering. 84:1865-1868
We investigate the influence of aluminum oxide (AlO) capping on SiON on the threshold voltage and I"o"n of Poly-Si/TiN gated pMOSFETs. The AlO capping resulted in threshold voltage (V"T) reduction and improvement in drive current (I"o"n) for Poly-Si/
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::263ecab4ee3788679b2e5430ac94d4ed
https://doi.org/10.1016/j.mee.2007.04.095
https://doi.org/10.1016/j.mee.2007.04.095
Autor:
L. Carbonell, N. Ban, S. Umehara, K. Kellens, Naomasa Suzuki, S. Takada, Toru Ishimoto, Henny Volders, Nancy Heylen, Zsolt Tokei, R. Caluwaerts
Publikováno v:
SPIE Proceedings.
The early detection of Cu sub-surface voids in nano-interconnects has become a main challenge with the reduction of the critical dimensions of the interconnects. A new methodology for full wafer Cu void inspection with high sensitivity and high speed
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0bdb30b31d066a6a756b4acc0c81db58
https://doi.org/10.1117/12.916254
https://doi.org/10.1117/12.916254