Zobrazeno 1 - 10
of 18
pro vyhledávání: '"Heng Chih Lin"'
Publikováno v:
Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films. 15:790-796
For the first time, metal–oxide–semiconductor interface atomic force microscope images were used to directly calculate the Fowler-Nordheim tunneling behavior for thin gate oxides with different interface roughness. Assuming that the roughness is
Publikováno v:
Solid-State Electronics. 35:1709-1712
A common-gate complementary metal-oxide-semiconductor (CMOS) inverter consisting of an n -channel amorphous silicon (a-Si:H) thin-film transistor on top of 1.2 μm high Al gate of the crystalline silicon p -channel metal-oxide-semiconductor (PMOS) tr
Publikováno v:
IEEE Electron Device Letters. 17:178-180
The correlation between inversion layer mobility of MOSFET's and surface micro-roughness of the channel has been studied using split CV measurements and AFM analysis. The mobility at high normal field decreases with increasing the surface roughness o
Autor:
Ah-Lyan Yee, A. Tsong, V. Pathak, Martin J. Izzard, E. Suder, J.M. Tran, R. Prentice, R. Venett, S. Spencer, R. Gu, Heng-Chih-Lin
Publikováno v:
1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326).
This paper describes a high speed, low jitter CMOS transceiver, which includes 10 to 1 full duplex serialize-deserialize function, clock recovery, high speed differential I/O, and Built In Self Test (BIST). It was fabricated and tested to work at wid
Publikováno v:
1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278).
Fiber Channel networks, gigabit Ethernet backbones, and IEEE 1394.b Firewire links require a high-speed point-to-point connection. This CMOS serial link transceiver dissipates 250 mW and has low jitter (8ps RMS, 44 ps P-P at 3.5 Gb/s), and wide frequ
Publikováno v:
Symposium on VLSI Technology.
Publikováno v:
MRS Proceedings. 473
For future CMOS GSI technology, Si/SiO2 interface micro-roughness becomes a non-negligible problem. Interface roughness causes fluctuations of the surface normal electric field, which, in turn, change the gate oxide Fowler-Nordheim tunneling behavior
Publikováno v:
MRS Proceedings. 386
Next generation ULSI devices will require ultra thin gate insulators where degradation due to contamination or surface microroughness is an even more important problem. Tunneling and breakdown characteristics are critical electrical testing methods,
Publikováno v:
MRS Proceedings. 386
Microroughness is a critical parameter in ULSI device interface reliability and has been shown to effect several critical MOS electrical properties. The atomic force microscope (AFM) has become the instrument of choice for silicon surface microroughn
Autor:
Heng-Chih Lin, Wen-Hwa Chen
Publikováno v:
AIAA Journal. 23:795-801
An assumed hybrid-displacement finite element model is presented to deal with the flutter problems of thin cracked panels. Based on a modified Hamilton's principle for nonconservative systems with relaxed continuity requirements for deflections and n