Zobrazeno 1 - 10
of 37
pro vyhledávání: '"Hee-Bog Kang"'
Autor:
Chang-Soo Jang, Hee-Bog Kang
Publikováno v:
The Journal of Korean Institute of Information Technology. 18:9-19
Publikováno v:
The Journal of Korean Institute of Information Technology. 18:135-141
Publikováno v:
The Journal of Korean Institute of Information Technology. 17:143-150
Publikováno v:
Journal of Crystal Growth. 462:12-17
The new Si epitaxial (epi) defects not seen in scanning electron microscope (SEM) measurements were investigated. Morphologies of these defects were measured by atomic force microscope (AFM) but source of defect was not found in transmission electron
Autor:
Sung Wook Lee, Anselmo Jaehyeong Lee, Ja-Young Kim, Hee-Bog Kang, Woo-Sung Lee, Jung-Won Shin
Publikováno v:
ECS Transactions. 75:77-80
Internal gettering (IG) of metallic impurities (MI) in Czochralski silicon (CZ-Si) is one of the key techniques in modern microelectronic engineering to manufacture high-performance devices with high process yield. Various silicon substrates such as
Publikováno v:
Solid-State Electronics. 164:107743
A novel haze technique for analyzing point-defect distribution in Czochralski Si (CZ-Si) wafers without intentional contamination by transition metals was proposed. Based on the background haze in high-temperature oxidation, a three-step oxidation pr
Publikováno v:
Journal of Crystal Growth. 531:125361
Herein, the effect of pre-annealing on oxygen precipitation in a silicon P/P-epitaxial wafer was investigated using an experimental approach. Czochralski-grown silicon wafers were annealed at 800–900 °C to enhance their bulk micro defects (BMDs),
Publikováno v:
ECS Journal of Solid State Science and Technology. 5:P3008-P3012
Autor:
Jong Ryeol Kim1 jrkim@chonnam.ac.kr, Hee Bog Kang2 kangsung@mail.hanyeong.ac.kr, Daehyeon Kim3 dkim@indot.state.in.us, Dal Su Park4 rabby2000@handongenc.co.kr, Woo Jin Kim5 wjkim@moiza.chonnam.ac.kr
Publikováno v:
Journal of Materials in Civil Engineering. Jun2007, Vol. 19 Issue 6, p492-499. 8p. 2 Diagrams, 3 Charts, 10 Graphs.
Autor:
Sung Min Hwang, Jang-Seop Kim, Ki-Sang Lee, Ja-Young Kim, Hee-Bog Kang, Yong Shin, Hyun-Yul Park, Byeong-Sam Moon, Sanghyun Lee, Jeong-Hoon An
Publikováno v:
ECS Transactions. 50:319-326
System on Chip (SoC) and System in Package (SiP) technologies provide a path for continued improvement in performance, power, cost and size at the system level without relying upon conventional CMOS scaling alone. SiP technology is rapidly evolved fr