Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Heather Lynn Hanson"'
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 14:1039-1043
This paper develops a technique that uniquely combines the advantages of compile-time static scheduling and hardware dynamic scheduling to reduce energy consumption in dynamically scheduled processors. In this hybrid-scheduling paradigm, regions of t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::70da7aeb593fff60c7ad9180722dfeaa
https://doi.org/10.1109/tvlsi.2006.884055
https://doi.org/10.1109/tvlsi.2006.884055
Publikováno v:
ICCD
Microprocessor performance has been improved by increasing the capacity of on-chip caches. However, the performance gain comes at the price of increased static energy consumption due to sub-threshold leakage current. This paper compares three techniq
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::cb359c5138a3417850c7f62680ec95d8
https://doi.org/10.1109/tvlsi.2003.812370
https://doi.org/10.1109/tvlsi.2003.812370
Autor:
Doug Burger, Heather Lynn Hanson, Karthikeyan Sankaralingam, Premkishore Shivakumar, Robert McDonald, Stephen W. Keckler, Paul V. Gratz
Publikováno v:
NOCS
Microarchitecturally integrated on-chip networks, or micronets, are candidates to replace busses for processor component interconnect in future processor designs. For micronets, tight coupling between processor microarchitecture and network architect
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::63f02a5665de8046ef31bcbf32440bd6
https://doi.org/10.1109/nocs.2007.23
https://doi.org/10.1109/nocs.2007.23
Autor:
Madhu Saravana Sibi Govindan, Robert McDonald, Haiming Liu, Divya P. Gulati, Sadia Sharif, Premkishore Shivakumar, Paul V. Gratz, Simha Sethumadhavan, Karthikeyan Sankaralingam, Changkyu Kim, Doug Burger, Rajagopalan Desikan, Ramadass Nagarajan, Stephen W. Keckler, Saurabh Drolia, Nitya Ranganathan, Heather Lynn Hanson
Publikováno v:
MICRO
Growing on-chip wire delays will cause many future microarchitectures to be distributed, in which hardware resources within a single processor become nodes on one or more switched micronetworks. Since large processor cores will require multiple clock
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8d7537249584fd223e2fca012250c7a8
https://doi.org/10.1109/micro.2006.19
https://doi.org/10.1109/micro.2006.19
Publikováno v:
ISLPED
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors with out-of-order issue logic. In this Hybrid-Scheduling paradigm, region
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f8b8e5057b6d5e3d3377d5b66a14f40a
https://doi.org/10.1145/871506.871608
https://doi.org/10.1145/871506.871608