Zobrazeno 1 - 10
of 26
pro vyhledávání: '"Hasan M. Nayfeh"'
Autor:
Neereja Sundaresan, Giacomo Nannicini, Daniela F. Bogorin, Petar Jurcevic, Adinath Narasgond, Oliver Dial, Emily J. Pritchett, Jay M. Gambetta, K. X. Wei, Christopher J. Wood, Toshinari Itoko, Eric J. Zhang, Markus Brink, Hasan M. Nayfeh, Ali Javadi-Abhari, Oktay Günlük, Kevin Krsulich, Srikanth Srinivasan, Isaac Lauer, William F. Landers, Jeng-Bang Yau, Eric P. Lewandowski, Naoki Kanazawa, George A. Keefe, Abhinav Kandala, Mary Beth Rothwell, Lev S. Bishop, Douglas McClure, Lauren Capelluto, Jerry M. Chow, Cindy Wang
We improve the quality of quantum circuits on superconducting quantum computing systems, as measured by the quantum volume, with a combination of dynamical decoupling, compiler optimizations, shorter two-qubit gates, and excited state promoted readou
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::2f86eed5c93d420a7ba39254b449133f
Autor:
Dhruv Singh, A. Gassaria, V. Chauhan, A. da Silva, P. Lindo, Daniel J. Dechene, M. Gribelyuk, I. Ahsan, M. Hasan, Judson R. Holt, Rod Augur, Jaeger Daniel, G. Northrop, G. Gomba, Ghosh Somnath, H. Narisetty, Basanth Jagannathan, Ting-Hsiang Hung, P. Liu, Y. Zhong, T. Gordon, Y. Fan, C. Schiller, A. Blauberg, O. Patterson, B. Morganfeld, Andres Bryant, J. Choo, T. Nigam, B. Senapati, V. Sardesai, N. Baliga, C. An, I. Ramirez, Rishikesh Krishnan, Arkadiusz Malinowski, S. Lucarini, Z. Sun, Sadanand V. Deshpande, R. Bhelkar, Mahender Kumar, Kong Boon Yeap, D. Conklin, Q. Fang, R. Gauthier, Purushothaman Srinivasan, S. Crown, M. Ozbek, Linjun Cao, G. Han, Z. Song, L. Huang, C. Serrau, R. Sweeney, M. Tan, Keith Donegan, Souvick Mitra, A. Zainuddin, P. Agnello, Balasubramanian S. Haran, Haifeng Sheng, B. Greene, A. Hassan, Tabakman Keith, Xin Wang, Sanjay Parihar, L. Cheng, M. Lagus, Jessica Dechene, D. Xu, G. Gifford, M. Zhao, Jeyaraj Antony Johnson, Y. Yan, Rick Carter, Manoj Joshi, W. Kim, Gabriela Dilliway, Jack M. Higman, S. Kalaga, Kai Zhao, Jinping Liu, A. Ogino, M. Lipinski, Amanda L. Tessier, Garo Jacques Derderian, S. Madisetti, N. Shah, Christopher Ordonio, M. Aminpur, Rakesh Ranjan, S. Saudari, Christa Montgomery, Tony Tae-Hyoung Kim, Jeric Sarad, Jae Gon Lee, Bharat Krishnan, Joseph F. Shepard, L. Hu, J. Sporre, Akil K. Sutton, Eswar Ramanathan, Cathryn Christiansen, J.H. Han, J. Lemon, Patrick Justison, Natalia Borjemscaia, Scott C. Johnson, B. Cohen, Kan Zhang, Srikanth Samavedam, G. Xu, T. Xuan, Unoh Kwon, C. Meng, Katsunori Onishi, Y. Shi, C. Huang, R. Coleman, Manfred Eller, Shreesh Narasimha, B. Kannan, J. Yang, Vivek Joshi, W. Ma, Christopher D. Sheraw, A. K. M. Mahalingam, Craig Child, E. Woodard, Tao Chu, Y. Jin, D. K. Sohn, Hasan M. Nayfeh, Mary Claire Silvestre, M. Lingalugari, G. Biery, Tian Shen, Carl J. Radens, E. Kaste, C-H. Lin, K. Han, K. Anil, Ankur Arya, Mehta Jaladhi, Jia Zeng, S.L. Liew, Michael V. Aquilino, M. Yu, M. Chen, Rohit Pal, E. Maciejewski, Stephan Grunow, Robert Fox, Rinus T. P. Lee
Publikováno v:
2017 IEEE International Electron Devices Meeting (IEDM).
We present a fully integrated 7nm CMOS platform featuring a 3rd generation finFET architecture, SAQP for fin formation, and SADP for BEOL metallization. This technology reflects an improvement of 2.8X routed logic density and >40% performance over th
Autor:
Russ Robison, Eric A. Foreman, Noah Zamdmer, James E. Sundquist, Brian A. Worth, Rick Wachnik, Peter W. Schneider, Ardasheir Rahman, Kai Zhao, Ximeng Guan, Jie Deng, Steve Shuma, Ning Lu, J. Johnson, Scott K. Springer, Rainer Thoma, Henry W. Trombley, Richard Q. Williams, Hasan M. Nayfeh
Publikováno v:
IEEE Transactions on Electron Devices. 62:1760-1768
In this paper, nFET-to-pFET (n-to-p) tracking characteristics in 14-nm silicon-on-insulator (SOI) FinFET technology are studied by technology computer-aided design-based statistical modeling. Compared with planar SOI high- $k$ metal gate CMOS technol
Autor:
Akil K. Sutton, Sachin Seth, G. L. Rosa, John D. Cressler, Gregory G. Freeman, Daniel M. Fleetwood, Hasan M. Nayfeh, Ronald D. Schrimpf, Rajan Arora, En Xia Zhang
Publikováno v:
IEEE Transactions on Nuclear Science. 58:2830-2837
The hot carrier and ionizing radiation responses of 45-nm SOI RF nMOSFETs are investigated. Devices with “tight” source/drain (S/D) contact spacing have improved RF performance but degraded hot carrier reliability and radiation tolerance. Devices
Autor:
Hasan M. Nayfeh, Nivo Rovedo, Andres Bryant, Shreesh Narasimha, Arvind Kumar, Xiaojun Yu, Ning Su, Jeffrey W. Sleight, Robert R. Robison, Werner Rausch, Hari Mallela, Greg Freeman
Publikováno v:
IEEE Transactions on Electron Devices. 56:3097-3105
Lateral asymmetric channel doping is applied to 45-nm technology NFET devices. The measured effective drain-current enhancement over coprocessed symmetric control devices is 10%. Analysis reveals that the dominant physical mechanism, which accounts f
Autor:
E. Engbrecht, Edward P. Maciejewski, Christopher D. Sheraw, R. Divakaruni, Zhengwen Li, Allen H. Gabor, L. Economikos, Fernando Guarin, N. Zhan, H-K Lee, MaryJane Brodsky, Kenneth J. Stein, Siyuranga O. Koswatta, Y. Yang, Byeong Y. Kim, J. Hong, A. Bryant, Herbert L. Ho, Ruqiang Bao, Nicolas Breil, Babar A. Khan, E. Woodard, W-H. Lee, C-H. Lin, A. Levesque, Kevin McStay, V. Basker, Viraj Y. Sardesai, C. Tran, A. Ogino, Reinaldo A. Vega, C. DeWan, Shreesh Narasimha, J-J. An, Amit Kumar, A. Aiyar, Ravikumar Ramachandran, W. Wang, X. Wang, W. Nicoll, D. Hoyos, A. Friedman, Barry Linder, Yongan Xu, E. Alptekin, Cathryn Christiansen, S. Polvino, Han Wang, Scott R. Stiffler, G. Northrop, S. Saudari, J. Rice, Saraf Iqbal Rashid, Sunfei Fang, Michael V. Aquilino, Z. Ren, B. Kannan, Geng Wang, Noah Zamdmer, T. Kwon, Paul D. Agnello, Hasan M. Nayfeh, S. Jain, Robert R. Robison, M. Hasanuzzaman, J. Cai, L. Lanzerotti, D. Wehelle-Gamage, Basanth Jagannathan, J. Johnson, E. Kaste, Kai Zhao, Huiling Shang, Carl J. Radens, Shariq Siddiqui, Y. Ke, D. Ferrer, Ximeng Guan, D. Conklin, K. Boyd, K. Henson, Siddarth A. Krishnan, Bernard A. Engel, H. Dong, S. Mahajan, Unoh Kwon, Dominic J. Schepis, William Y. Chang, Liyang Song, Brian J. Greene, Chengwen Pei, S.-J. Jeng, Clevenger Leigh Anne H, Vijay Narayanan, C. Zhu, Wai-kin Li, Henry K. Utomo, Wei Liu, Dureseti Chidambarrao
Publikováno v:
2014 IEEE International Electron Devices Meeting.
We present a fully integrated 14nm CMOS technology featuring finFET architecture on an SOI substrate for a diverse set of SoC applications including HP server microprocessors and LP ASICs. This SOI finFET architecture is integrated with a 4th generat
Autor:
Guangrui Xia, N. Klymko, Eugene A. Fitzgerald, Minjoo L. Lee, Hasan M. Nayfeh, Robert Hull, J.L. Hoyt, Jian Li, Dimitri A. Antoniadis, Dalaver H. Anjum
Publikováno v:
IEEE Transactions on Electron Devices. 51:2136-2144
The impact of processing factors such as ion implantation and rapid thermal annealing on mobility enhancement in strained-Si n-channel metal-oxide-semiconductor field-effect transistors (n-MOSFETs) has been investigated. Long-channel strained-Si and
Publikováno v:
IEEE Transactions on Electron Devices. 51:2069-2072
A physically based analytic model for the threshold voltage V/sub t/ of long-channel strained-Si--Si/sub 1-x/Ge/sub x/ n-MOSFETs is presented and confirmed using numerical simulations for a wide range of channel doping concentration, gate-oxide thick
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 15:151-156
A tradeoff between the performance and power consumption is discussed for below-70-nm technology-node MOSFETs, as a function of power-supply voltage. In order to optimize the supply voltage, gate-delay (CV/I) and energy-delay product (C/sup 2/V/sup 3
Autor:
Mukesh Khare, James N. Pan, D.V. Singh, Kathryn W. Guarini, Hasan M. Nayfeh, John M. Hergenrother, B.L. Tessier, John A. Ott, Meikei Ieong, Linda Black, O. Dokumaci, Wilfried Haensch, R. Venigalla, Zhibin Ren, Jeffrey W. Sleight, Wesley C. Natzle, Dureseti Chidambarrao
Publikováno v:
IEEE Electron Device Letters. 27:288-290
In this letter, the effect of longitudinal uniaxial mechanical stress on electron mobility in high-performance fully depleted ultrathin silicon-on-insulator nFETs with a raised source/drain (RSD) architecture and channel lengths ranging from 1 /spl m