Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Harvey Cheng"'
Autor:
Hsueh-Jen Tsai, Chia-Hung Chen, Myungjun Lee, Kuo-Yao Chou, Mark D. Smith, Jo-Lan Chin, Jen-Chou Huang, Hao-Lun Huang, Chen Dror, Healthy Huang, Jui-Chin Yang, Yuan-Ku Lan, Michael E. Adel, Harvey Cheng, Jinyan Song, Tal Itzkovich, Ady Levy, Yaniv Abramovitz, Chin-Chang Huang, I-Lin Wang, Hsien-Yen Lung
Publikováno v:
SPIE Proceedings.
We present a novel metrology target design framework using the scanner exit pupil wavefront analysis together with Zernike sensitivity analysis (ZSA) based on the Monte-Carlo technique. The proposed method enables the design of robust metrology targe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f7fce7d6ac86885d3ff9888443f23af9
https://doi.org/10.1117/12.2218659
https://doi.org/10.1117/12.2218659
Autor:
White Pai, Kwok Ng, Jung Yan Yang, Archer Hsieh, Eros Huang, Harvey Cheng, Mahatma Lin, Sam Chen, Polly Lan, Garry Chen
Publikováno v:
25th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC 2014).
High-K metal gate processes induce new process and wafer defect inspection challenges compared with traditional poly silicon. Mechanisms of two systematic yield-limiting defects at the contact loop process step are discussed. In addition, an innovati
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a8205ed6212d4e77861d8f28dfd3688e
https://doi.org/10.1109/asmc.2014.6846964
https://doi.org/10.1109/asmc.2014.6846964
Autor:
P. Y. Chiang, Mahatma Lin, Kwok Ng, Eros Huang, Harvey Cheng, Frank Jin, Elston Chen, Tetsuya Yamamoto, Garry Chen, White Pai, Wen Pang Lin, Sam Chen
Publikováno v:
ASMC 2013 SEMI Advanced Semiconductor Manufacturing Conference.
For foundry fabs, detecting systematic yield-limiting (Ys) defects is one of the most critical tasks during the R&D and ramping stages of the product life cycle. The sooner systematic defects can be identified, the faster fixes can be implemented to
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0c08a58b2a06dd84c8642194b7f169c1
https://doi.org/10.1109/asmc.2013.6552763
https://doi.org/10.1109/asmc.2013.6552763
Autor:
Nagus Chen, Harvey Cheng, Jun Lang, Kan Chen, Eros Huang, Henry Yang, Mahatma Lin, Jyn Hao Syu, P. Y. Chiang, Chen Chiz Lin
Publikováno v:
2012 SEMI Advanced Semiconductor Manufacturing Conference.
Lithography process monitoring has always been a challenging step in foundry fabs. Broadband brightfield inspectors are used to meet the sensitivity requirement on low contrast photo-cell monitoring (PCM) process layers. However, the throughput of br
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5e66cb27319209148c429c858691a9ea
https://doi.org/10.1109/asmc.2012.6212930
https://doi.org/10.1109/asmc.2012.6212930
Autor:
Chao-Yu Harvey Cheng, Chin-Cheng Chien, Lanny Mihardja, Jason Z. Lin, Catherine Perry-Sullivan, Yu-Wen Wang, Ching-Hung Bert Lin, Sungchul Yoo, Autumn Yeh, Zhi-Qing James Xu, Pao-Chung Lin
Publikováno v:
2012 SEMI Advanced Semiconductor Manufacturing Conference.
Novel process control methodologies are required for SiGe gate recess structures that are used in IC manufacturing to enhance device performance. Metrology measurements of 28nm SiGe after-etch inspection U-sigma shaped and V-sigma shaped gate structu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3d427266e12aa296f13452650487b0bf
https://doi.org/10.1109/asmc.2012.6212879
https://doi.org/10.1109/asmc.2012.6212879
Autor:
Chao-Yu Harvey Cheng, Juli Cheng, Wei-Jhe Tzai, Lanny Mihardja, Chun-Chi Yu, Chien-Jen Eros Huang, Houssam Chouaib, Shi-Ming Jeremy Wei, Howard Chen, Sungchul Yoo, Yu-Hao Huang, Ching-Hung Bert Lin, Zhi-Qing James Xu
Publikováno v:
SPIE Proceedings.
Scatterometry-based metrology measurements for advanced gate after-develop inspection (ADI) and after-etch inspection (AEI) structures have been well proven 1 . This paper discusses the metrology challenges encountered in implementing a production-wo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7061e6719b920cf4ee3265bf2f50a661
https://doi.org/10.1117/12.916234
https://doi.org/10.1117/12.916234
Autor:
Chao-Yu Harvey Cheng, Juli Cheng, Wu-Sian Sie, Houssam Chouaib, Qiong-Yan Yuan, Zhiming Jiang, Chih-Hsun Lin, Chia-Lin Hsu, Juan-Yuan Wu, Chien-Jen Eros Huang, Zhi-Qing James Xu, Ching-Hung Bert Lin, Sungchul Yoo, Climbing Huang
Publikováno v:
SPIE Proceedings.
At the 28nm node using 300mm wafers, oxide step height in STI CMP transient gate after-etch inspection (TG AEI) wafers is a critical parameter that affects device performance and should be monitored and controlled. For production process control of t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e15505d1637a8936483c54bb255687f0
https://doi.org/10.1117/12.916235
https://doi.org/10.1117/12.916235
Autor:
Qiang Zhao, Houssam Chouaib, Sheng-Hung Wu, Tien-Hung Lan, Harvey Cheng, Ming-Feng Kuo, Shuang Hsun Chang, Elvis Wang
Publikováno v:
SPIE Proceedings.
As DRAM design advances from planar to vertical integration, process control of the recessed gate, generated by etching after patterning in vertical DRAM, is very critical because of the impact on device electrical characteristics and subsequent effe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7dacf6e4fdfe85fc99d11703c796114e
https://doi.org/10.1117/12.916143
https://doi.org/10.1117/12.916143
Autor:
Xiafang Zhang, Shu-Hao Wu, Mi Jian, Chin-Ming Han, P. Ives, Harvey Cheng, T.S.T. Chang, S. Fu
Publikováno v:
2007 IEEE/SEMI Advanced Semiconductor Manufacturing Conference (ASMC).
In order to monitor plasma-enhanced SiON process for 70-nm-node, the Corona Oxide Silicon technology (Quantox XP) is implemented to detect the gate material characteristic besides optical metrology tool. H2 annealing following post-nitridation anneal
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::be51ccc432c4a4e4e47597eaf8195b49
https://doi.org/10.1109/asmc.2007.375085
https://doi.org/10.1109/asmc.2007.375085
Publikováno v:
2007 IEEE/SEMI Advanced Semiconductor Manufacturing Conference (ASMC).
As IC technology advances result in progressively smaller device dimensions, understanding and characterizing the impact of process variations on wafer surface conditions and identifying potential surface damage becomes critical. UV laser scattering
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dbe31ef7f26c44b04d046b4df014d3c9
https://doi.org/10.1109/asmc.2007.375082
https://doi.org/10.1109/asmc.2007.375082