Zobrazeno 1 - 10
of 167
pro vyhledávání: '"Harvard architecture"'
Autor:
Valery A. Konyavsky, Gennady V. Ross
Publikováno v:
Journal of Mechanical Engineering Research and Developments, Vol 42, Iss 3, Pp 19-23 (2019)
The relevance of this article is that, despite the rapid development of computer technologies, it has not been yet invented the architecture that did not have vulnerabilities for hacker attacks. The purpose of the paper is to find a way of creation a
Externí odkaz:
https://doaj.org/article/01afe49c0f0149dc9ce80687e0d3cbd6
Publikováno v:
Tecnura, Vol 22, Iss 56, Pp 40-50 (2018)
Context: This paper is presents the design and implementation of an 8-bit softcore RISC microprocessor able to be run on space-optimized FPGA, in order to be used for embedded applications. Method: The design of this microprocessor was developed in
Externí odkaz:
https://doaj.org/article/86703b8e2a714d61984f68eaf0cb0d81
Autor:
Aleksandrov P.L., Adamovich E.D.
Publikováno v:
Biomedicinskaâ Inženeriâ i Èlektronika, Vol 1, Iss 12, Pp 42-97 (2016)
The aim of this work is just to outline in brief the versatility, flexibility, the commutation limits, the upgrade possibilities and modernization prospects of the “Plurimat” system, since the comprehensive review of all the works performed with
Externí odkaz:
https://doaj.org/article/30402024a3c2426190664c502c1d4b01
Akademický článek
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Publikováno v:
Materials Today: Proceedings. 47:135-138
The True random number generation (TRNG) is a process which takes different physical quantities that should be non-deterministic in nature and then they are post processed to reduce potential biases in the random number generation process. The true r
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2380161e8eb63eb39938536f252a865b
https://doi.org/10.1016/j.matpr.2021.04.019
https://doi.org/10.1016/j.matpr.2021.04.019
Publikováno v:
IJCNN
This work proposes a memory optimization technique for embedded Multi-Layer Perceptron (MLP) Artificial Neural Networks (ANNs) applications in a Microcontroller (µC) device as implementation platform. This platform has an attached general-purpose pr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::07e99d1e6b0b3b2969055a37774e3b1c
https://doi.org/10.1109/ijcnn52387.2021.9533594
https://doi.org/10.1109/ijcnn52387.2021.9533594
Publikováno v:
2021 7th International Conference on Advanced Computing and Communication Systems (ICACCS).
The reduced instruction set computer, or RISC, is a microprocessor that executes small and similar instructions that execute in about similar time. The objective is to reduce the complexity of instructions which in turn reduces the cost, cycle time a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::681c477ee120eec1157c8c652d4cb014
https://doi.org/10.1109/icaccs51430.2021.9441873
https://doi.org/10.1109/icaccs51430.2021.9441873
Publikováno v:
2021 7th International Conference on Advanced Computing and Communication Systems (ICACCS).
Reduced Instruction Set Computing (RISC) processors have wide selection of applications performance on speed and better cache memory. The advanced RISC microprocessors are extensively used for many of the complicated systems. Reduced Instruction set
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9f46a15a15e445468a94b47a995ebc08
https://doi.org/10.1109/icaccs51430.2021.9442045
https://doi.org/10.1109/icaccs51430.2021.9442045
Publikováno v:
Handbook of Artificial Intelligence for Music ISBN: 9783030721152
The technology behind the computers, and all sorts of data processing devices pervading our daily lives, are underpinned by paradigms such as the Turing machine, the von Neumann architecture, the Harvard architecture, and so on, which were invented i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::87f311a68240349d1662c99a3943f7df
https://doi.org/10.1007/978-3-030-72116-9_33
https://doi.org/10.1007/978-3-030-72116-9_33
Publikováno v:
Advances in Automation, Signal Processing, Instrumentation, and Control ISBN: 9789811582202
The keyword RISC stands for reduced instruction set computer. RISC architecture has become an important part of designing processors. This chapter discusses the designed processor using the Harvard architecture. This architecture has a different memo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1ffb7e7f454b2519e9020dd1dd8b1323
https://doi.org/10.1007/978-981-15-8221-9_221
https://doi.org/10.1007/978-981-15-8221-9_221