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pro vyhledávání: '"Harlan Sur"'
Publikováno v:
EDFA Technical Articles. 1:19-30
Passive voltage contrast (PVC) has traditionally been used by semiconductor engineers for end-of-line post-mortem analysis. PVC distinguishes between open and short structures and is both nondestructive and noncontact. When applied during process dev
Autor:
Hunter B. Brugge, Martin P. Karnett, Vijaya Subramaniam, Steven G. Qian, Todd Mitchell, Harlan Sur, Bradley J. Haby
Publikováno v:
SPIE Proceedings.
Bitmap and electrical microprobe techniques were employed to detect and isolate NMOS gate depletion within the SRAM cells of our 0.20micrometers Complementary Poly CMOS process. This gate depletion problem led to a 3X drop-off in device drive current
Publikováno v:
SPIE Proceedings.
This paper describes some of the methodologies employed to achieve rapid yield learning on 0.25 micrometer, three-layer metal CMOS process. This includes: (1) design of a manufacturing-representative process qualification vehicle which readily lends