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pro vyhledávání: '"Hari Bilash Dubey"'
Publikováno v:
Memories - Materials, Devices, Circuits and Systems, Vol 8, Iss , Pp 100105- (2024)
In the recent HBM2E IO design, clock is transmitted differentially to the external DRAM and duty cycle distortion (DCD) could add to the differential clock due to traversing multiple stages in DRAM. At higher data rates, the DCD from the differential
Externí odkaz:
https://doaj.org/article/eba2fbc4f19c43fb958ef49b0cf31d9a
Publikováno v:
2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems (VLSID).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1a01d627c2aa83c15fdda1ebc7de9497
https://doi.org/10.1109/vlsid57277.2023.00030
https://doi.org/10.1109/vlsid57277.2023.00030