Zobrazeno 1 - 10
of 30
pro vyhledávání: '"Hardware countermeasure"'
Autor:
Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, Antonio José Acosta-Jiménez, Carlos Jesús Jiménez-Fernández, Ricardo Chaves
Publikováno v:
Applied Sciences, Vol 12, Iss 5, p 2443 (2022)
The development of differential fault analysis (DFA) techniques and mechanisms to inject faults into cryptographic circuits brings with it the need to use protection mechanisms that guarantee the expected level of security. The AES cipher, as a stand
Externí odkaz:
https://doaj.org/article/bdbb4fab7ee54a7cb93ba99d13fae10e
Akademický článek
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Publikováno v:
International Journal of Computing and Digital Systems. 3:69-78
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fd5e12466cb9f5d09cf739499b18442a
https://doi.org/10.12785/ijcds/030201
https://doi.org/10.12785/ijcds/030201
Autor:
Portella, Rodrigo
Cette thèse aborde la conception et les contremesures permettant d'améliorer le calcul cryptographique matériel léger. Parce que la cryptographie (et la cryptanalyse) sont de nos jours de plus en plus omniprésentes dans notre vie quotidienne, il
Externí odkaz:
http://www.theses.fr/2016PSLEE036/document
Autor:
Portella, Rodrigo
Publikováno v:
Cryptography and Security [cs.CR]. Université Paris sciences et lettres, 2016. English. ⟨NNT : 2016PSLEE036⟩
This thesis addresses lightweight hardware design and countermeasures to improve cryptographic computation. Because cryptography (and cryptanalysis) is nowadays becoming more and more ubiquitous in our daily lives, it is crucial that newly developed
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od______2592::f769753fb77082653898183844a1299a
https://tel.archives-ouvertes.fr/tel-01743786
https://tel.archives-ouvertes.fr/tel-01743786
Publikováno v:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. :169-178
In this paper, we propose new models for directly evaluating DPA leakage from logic information in CMOS circuits. These models are based on the transition probability for each gate, and are naturally applicable to various actual devices for simulatin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a9a64cf2dc52620bce54bae78ff979aa
https://doi.org/10.1093/ietfec/e90-a.1.169
https://doi.org/10.1093/ietfec/e90-a.1.169
Publikováno v:
Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation ISBN: 9783642241536
PATMOS
21st International Workshop on Power and Timing Modeling, Optimization and Simulation
PATMOS: Power And Timing Modeling, Optimization and Simulation
PATMOS: Power And Timing Modeling, Optimization and Simulation, Sep 2011, Madrid, Spain. pp.331-340, ⟨10.1007/978-3-642-24154-3_33⟩
PATMOS
21st International Workshop on Power and Timing Modeling, Optimization and Simulation
PATMOS: Power And Timing Modeling, Optimization and Simulation
PATMOS: Power And Timing Modeling, Optimization and Simulation, Sep 2011, Madrid, Spain. pp.331-340, ⟨10.1007/978-3-642-24154-3_33⟩
International audience; Side Channel Attacks (SCAs) are a serious threat against security of cryptographic algorithms. Most of the countermeasures proposed to protect cryptosystems against these attacks, are efficient but present a significant area a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::45054cb0cefb5ed44b2c15fa754979d4
https://doi.org/10.1007/978-3-642-24154-3_33
https://doi.org/10.1007/978-3-642-24154-3_33
Publikováno v:
VDAT
Power analysis attacks (PAAs) present a major threat towards safeguarding the secrets of cryptographic systems. We have devised a hardware countermeasure in the form of a Binary Decision Diagram (BDD) based dual-rail circuits and a supporting synthes
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5cadc1c3682d754e64ed2c2fa226ce4d
https://doi.org/10.1109/isvdat.2014.6881088
https://doi.org/10.1109/isvdat.2014.6881088
Autor:
Vaquié, Bruno
Les attaques par canaux cachés telles que les attaques par analyse de la consommation sont une menace pour la sécurité des circuits intégrés. Elles exploitent les fuites physiques émises par les circuits lors des calculs cryptographiques pour r
Externí odkaz:
http://www.theses.fr/2012MON20133/document
Publikováno v:
2011 VII Southern Conference on Programmable Logic (SPL).
The Wave Dynamic Differential Logic (WDDL) is considered as a relevant hardware countermeasure to increase the robustness of cryptographic devices against Differential Power Attacks (DPA). However, to guarantee its effectiveness, the routing in both
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8f00b3d10cfbadcda23e5c6a9fe6a239
https://doi.org/10.1109/spl.2011.5782647
https://doi.org/10.1109/spl.2011.5782647