Recommendations for a radically secure ISA

Autor: Escouteloup, Mathieu, Lashermes, Ronan, Lanet, Jean-Louis, Fournier, Jacques Jean-Alain

Publikováno v: Fourth Workshop on Computer Architecture Research with RISC-V
CARRV 2020-Workshop on Computer Architecture Research with RISC-V
CARRV 2020-Workshop on Computer Architecture Research with RISC-V, May 2020, Valence (virtual), Spain. pp.1-22

International audience; The rising number of attacks targeting processors at micro-architecture level encourages more research on hardware level solutions.In this position paper, we specify a new RV32S “secure” instruction set architecture (ISA)

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::8e1f73b8b6b9d8858df9209b2f91787c
https://hal.archives-ouvertes.fr/hal-03128242