Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Haowen Bu"'
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 18:42-48
The polycrystalline silicon deposited by single-wafer rapid thermal chemical vapor deposition with both silane (SiH/sub 4/) and disilane (Si/sub 2/H/sub 6/) precursors have been characterized for across wafer uniformity, thickness repeatability, and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b127fa7dd8862673d8e3ccf07993921f
https://doi.org/10.1109/tsm.2004.841749
https://doi.org/10.1109/tsm.2004.841749
Publikováno v:
2009 17th International Conference on Advanced Thermal Processing of Semiconductors.
The performance improvement associated with the intentional manipulation of stresses on the transistor scale is an integral part of device fabrication at advanced technology nodes. However, comparatively little attention is given to stress management
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1bb454a6fdc0e6b8959df36730bae141
https://doi.org/10.1109/rtp.2009.5373427
https://doi.org/10.1109/rtp.2009.5373427
Publikováno v:
2009 International Workshop on Junction Technology.
Advanced technology nodes are increasingly dependent on strain engineering to achieve the performance targets. However, processes throughout device fabrication have the potential to inadvertently relax or modify the stress. The relative importance of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fdd65ec6118a0232feab0d29889b2641
https://doi.org/10.1109/iwjt.2009.5166208
https://doi.org/10.1109/iwjt.2009.5166208
Autor:
Rajesh Khamankar, Lancy Tsung, Mark R. Visokay, M. Douglas, A. Shanware, Luigi Colombo, M. J. Bevan, R. T. Laaksonen, R. Kuan, Tad Grider, Haowen Bu, J. McPherson, James J. Chambers, Antonio L. P. Rotondaro
Publikováno v:
2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).
We report for the first time on short channel transistors fabricated using HfSiON, a new high-k gate dielectric material. HfSiON has superior electrical characteristics such as low leakage current relative to SiO/sub 2/, low interfacial trap density,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2e5c8ec14031857e428673f9341b6f3a
https://doi.org/10.1109/vlsit.2002.1015428
https://doi.org/10.1109/vlsit.2002.1015428
Publikováno v:
ECS Meeting Abstracts. :2418-2418
When wafers with embedded SiGe (e-SiGe) are laser annealed, serious wafer warpage can result. This warpage will lead to registration error when patterning is attempted to create contacts, and can make subsequent processing of the wafers impossible. I
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b847ed54573a14016e94e303f32f661c
https://doi.org/10.1149/ma2008-02/37/2418
https://doi.org/10.1149/ma2008-02/37/2418
Autor:
Yuanning Chen1, Haowen Bu1, Watts Butler, Stephanie1, Cunningham, Kevin L.2, Shulin Wang2, Spicer, Bill3
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. Feb2005, Vol. 18 Issue 1, p42-48. 6p.
Publikováno v:
2009 17th International Conference on Advanced Thermal Processing of Semiconductors; 2009, p1-8, 8p
Publikováno v:
2009 International Workshop on Junction Technology; 2009, p15-18, 4p