Zobrazeno 1 - 10
of 17
pro vyhledávání: '"Hang-Geun Jeong"'
Publikováno v:
ISOCC
We propose a new current mode CMOS squaring circuit which directly yields the square term. The proposed squaring circuit was designed in a standard with 0.18 µm CMOS technology. The designed chip occupies a chip area of 408µm × 197µm and consumes
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ae5568d3267dac982f909ff5cc0ad2bb
https://doi.org/10.1109/isocc50952.2020.9333090
https://doi.org/10.1109/isocc50952.2020.9333090
Publikováno v:
ISOCC
A new current-mode analog neuron with a current link between the soma and the synapse is proposed. The proposed neuron requires fewer number of transistors for its synapse due to the merged switch array used for binary weighting. Thus, the burden of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e894d566d97baaecde92303ff0c3d551
https://doi.org/10.1109/isocc50952.2020.9332923
https://doi.org/10.1109/isocc50952.2020.9332923
Publikováno v:
Electronics, Vol 9, Iss 562, p 562 (2020)
Electronics
Volume 9
Issue 4
Electronics
Volume 9
Issue 4
A reconfigurable CMOS inverter-based stacked power amplifier (PA) is proposed to extend impedance coverage, while maintaining an output power exceeding the specific power level under the worst antenna impedance mismatch conditions. The adopted proces
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::06dc3dae19a7fa769419b3b6e4557cdd
https://www.mdpi.com/2079-9292/9/4/562
https://www.mdpi.com/2079-9292/9/4/562
Publikováno v:
Journal of Sensor Science and Technology. 25:326-332
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f6ffdf96a32a890a61b39cf5b0206506
https://doi.org/10.5369/jsst.2016.25.5.326
https://doi.org/10.5369/jsst.2016.25.5.326
Publikováno v:
Journal of the Institute of Electronics and Information Engineers. 51:172-178
This paper presents a new model of the Miller effect. The new Miller effect model is obtained from the accurate AC gain which includes the effect of the output capacitance of the common-source (CS) amplifier. The new Miller effect model consists of t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fc922a6366b62c457d9e143967ece790
https://doi.org/10.5573/ieie.2014.51.1.172
https://doi.org/10.5573/ieie.2014.51.1.172
Publikováno v:
JSTS:Journal of Semiconductor Technology and Science. 12:186-192
Half-rail stacked drivers are used to reduce power consumption of the drivers for synchronous buck converters. In this paper, the stacked driver is optimized by matching the average charging and discharging currents used by high-side and low-side dri
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f9e0cd6574a40d42bbbc1bf0d37799a7
https://doi.org/10.5573/jsts.2012.12.2.186
https://doi.org/10.5573/jsts.2012.12.2.186
Autor:
Hoh-Young Heo, Hang-Geun Jeong
Publikováno v:
Journal of the Korea Academia-Industrial cooperation Society. 10:269-273
A voltage regulator can be used to reduce the effect of the power-supply noise on the control voltage of the VCO. An accurate analysis of the voltage regulator circuit is needed for the optimal design of the voltage regulator. This paper clarifies an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::72b7ee1730403532c0b1eeb7679d06ea
https://doi.org/10.5762/kais.2009.10.2.269
https://doi.org/10.5762/kais.2009.10.2.269
Autor:
Hang-Geun Jeong, Seong-Ik Cho, Ki-Sang Jung, Jong-Yeol Lee, Young-Eun Kim, Kang-Jik Kim, Kihyun Pyun, Jin-Gyun Chung
Publikováno v:
IEICE Transactions on Electronics. :352-355
In memory design, the issue is smaller size and low power. Most power used in the ROM is consumed in line capacitance such as address lines, word lines, bit lines, and decoder. This paper presents ROM design of a novel HG (Half Grouping) compression
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8f056936ddd2c331f0edcf74cf9cbbc5
https://doi.org/10.1587/transele.e92.c.352
https://doi.org/10.1587/transele.e92.c.352
Publikováno v:
Current Applied Physics. 7:92-95
This paper proposes a new bandgap reference (BGR) circuit which adopts a cascode current mirror biasing for reducing the reference voltage variation and a novel sizing method for reducing the PNP BJT area. The proposed BGR was designed and fabricated
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::760fcc23ddc50e64648c249f0dcfed15
https://doi.org/10.1016/j.cap.2006.02.008
https://doi.org/10.1016/j.cap.2006.02.008
This paper presents a method of reducing the feedback delay time of DWA(Data Weighted Averaging) used in sigma-delta modulators. The delay time reduction results from the elimination of the latch at the quantizer output and also from the falling edge
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::104cb389e7d20ff7b4bb79d8a6585df7
