65nm high performance SRAM technology with 25F2 0.16μm2 S3 (stacked single-crystal Si) SRAM cell, and stacked peripheral SSTFT for ultra high density and high speed applications.

Autor: Hoon Lim, Soon-Moon Jung, Youngseop Rah, Taehong Ha, Hanbyung Park, Chulsoon Chang, Wonsuk Cho, Jaikyun Park, Byoungkeun Son, Jaehun Jeong, Hoosung Cho, Bonghyun Choi, Kinam Kim

Publikováno v: Proceedings of 35th European Solid-State Device Research Conference, 2005 (ESSDERC 2005); 2005, p549-552, 4p

Highly cost effective and high performance 65nm S3 (stacked single-crystal Si) SRAM technology with 25F2, 0.16um2 cell and doubly stacked SSTFT cell transistors for ultra high density and high speed applications.

Autor: Soon-Moon Jung, Youngseop Rah, Taehong Ha, Hanbyung Park, Chulsoon Chang, Seungchul Lee, Jongho Yun, Wonsuk Cho, Hoon Lim, Jaikyun Park, Jaehun Jeong, Byoungkeun Son, Jaehoon Jang, Bonghyun Choi, Hoosung Cho, Kinam Kim

Publikováno v: 2005 Digest of Technical Papers. 2005 Symposium on VLSI Technology; 2005, p220-221, 2p