Zobrazeno 1 - 2
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pro vyhledávání: '"Hai Viet Tran"'
Publikováno v:
2017 7th International Conference on Integrated Circuits, Design, and Verification (ICDV).
This paper presents the implementation of the variance compensation solution for the center frequency of the intermediate frequency (IF) 10.7 MHz Gm-C filter under the effect of operating temperature. The designed filter is implemented in CMOS 0.35μ
Publikováno v:
2015 International Conference on Advanced Technologies for Communications (ATC).
This article proposes a reconfiguration solution for CMOS frequency synthesizer with a hybrid architecture which is a combination of a Direct Digital Synthesizer (DDS) and a Phase Locked Loop (PLL). The DDS is implemented in FPGA platform functioning