Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Haggai Eran"'
Autor:
Haggai Eran, Maxim Fudim, Gabi Malka, Gal Shalom, Noam Cohen, Amit Hermony, Dotan Levi, Liran Liss, Mark Silberstein
Publikováno v:
Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems.
Publikováno v:
ASPLOS
CPUs routinely offload to NICs network-related processing tasks like packet segmentation and checksum. NIC offloads are advantageous because they free valuable CPU cycles. But their applicability is typically limited to layer≤4 protocols (TCP and l
Autor:
Austin Bolen, Igor Smolyar, Alex Markuze, Dan Tsafrir, Gerd Zellweger, Haggai Eran, Boris Pismenny, Liran Liss, Adam Morrison
Publikováno v:
ASPLOS
In a multi-CPU server, memory modules are local to the CPU to which they are connected, forming a nonuniform memory access (NUMA) architecture. Because non-local accesses are slower than local accesses, the NUMA architecture might degrade application
Autor:
Shachar Raindel, Nadav Amit, Guy Shapiro, Liran Liss, Muli Ben-Yehuda, Sagi Grimberg, Haggai Eran, Dan Tsafrir, Ilya Lesokhin
Publikováno v:
ASPLOS
Direct network I/O allows network controllers (NICs) to expose multiple instances of themselves, to be used by untrusted software without a trusted intermediary. Direct I/O thus frees researchers from legacy software, fueling studies that innovate in
Autor:
Haggai Eran, Michael Cui, Boris Pismenny, Yiying Zhang, Michael Wei, Marcos K. Aguilera, Liran Liss, Aasheesh Kolli, Dan Tsafrir, Stanko Novakovic, Yizhou Shan
Publikováno v:
SYSTOR
RDMA technology enables a host to access the memory of a remote host without involving the remote CPU, improving the performance of distributed in-memory storage systems. Previous studies argued that RDMA suffers from scalability issues, because the
Publikováno v:
FCCM
High-level synthesis (HLS) allows developers to be more productive in designing FPGA circuits thanks to familiar programming languages and high-level abstractions. In order to create high-performance circuits, HLS tools, such as Xilinx Vivado HLS, re
Autor:
Haggai Eran, Yibo Zhu, Yehonatan Liron, Jitendra Padhye, Daniel Firestone, Mohamad Haj Yahia, Marina Lipshteyn, Ming Zhang, Shachar Raindel, Chuanxiong Guo
Publikováno v:
SIGCOMM
Modern datacenter applications demand high throughput (40Gbps) and ultra-low latency (< 10 μs per hop) from the network, with low CPU overhead. Standard TCP/IP stacks cannot meet these requirements, but Remote Direct Memory Access (RDMA) can. On IP-
Autor:
Erez Petrank, Haggai Eran
Publikováno v:
MSPC@PLDI
Computing environments become increasingly parallel, and it seems likely that we will see more cores on tomorrow's desktops and server platforms. In a highly parallel system, tracing garbage collectors may not scale well due to deep heap structures t
Autor:
Haggai Eran, Yossi Richter, Sigal Asaf, Michael J. Mcinnis, Donna L. Gresh, Daniel Patrick Connors, Julio Ortega
Publikováno v:
Principles and Practice of Constraint Programming – CP 2010 ISBN: 9783642153952
CP
CP
Today many companies face the challenge of matching highly-skilled professionals to high-end positions in large organizations and human deployment agencies. Non-accurate matches in these businesses can result in significant monetary losses and other
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5604abe04e2068a4281d6b3cf34f5a81
https://doi.org/10.1007/978-3-642-15396-9_5
https://doi.org/10.1007/978-3-642-15396-9_5
Publikováno v:
SYSTOR
Apache is a large-scale industrial multi-process and multithreaded application, which uses lock-based synchronization. We report on our experience in modifying Apache's cache module to employ transactional memory instead of locks, a process we refer