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pro vyhledávání: '"Hadjilambrou, Zacharias"'
Akademický článek
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Autor:
Hadjilambrou, Zacharias A.
Includes bibliographical references (p. 102-110). Number of sources in the bibliography: 96 Thesis (Ph. D.) -- University of Cyprus, Faculty of Pure and Applied Sciences, Department of Computer Science, 2019. The University of Cyprus Library holds th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od______4485::5c3aea9d38dbbcc9e02df8fde8ef109a
http://gnosis.library.ucy.ac.cy/handle/7/64786
http://gnosis.library.ucy.ac.cy/handle/7/64786
Autor:
Hadjilambrou, Zacharias, Das, Shidhartha, Whatmough, Paul N, Bull, David, Sazeides, Yiannakis
Publikováno v:
ISPASS
2019 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)
2019 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)
This work presents GeST (Generator for Stress-Tests): a framework for automatically generating CPU stress-tests. The framework is based on genetic algorithm search and can be used to maximize different target CPU metrics such as power, temperature, i
Autor:
Hadjilambrou, Zacharias, Kleanthous, Marios, Antoniou, Georgia, Portero, Antoni, Sazeides, Yiannakis
Publikováno v:
ACM Transactions on Architecture and Code Optimization
ACM Trans. Archit. Code Optim.
ACM Trans. Archit. Code Optim.
This work performs a thorough characterization and analysis of the open source Lucene search library. The article describes in detail the architecture, functionality, and micro-architectural behavior of the search engine, and investigates prominent o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3618bf7b17de6a5cc8a17bc63af95e76
http://hdl.handle.net/10084/138451
http://hdl.handle.net/10084/138451
Publikováno v:
MICRO
2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)
2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)
Worst-case dI/dt voltage noise is typically characterized post-silicon using direct voltage measurements through either on-package measurement points or on-chip dedicated circuitry. These approaches consume expensive pad resources or suffer from desi
Autor:
Tovletoglou, Konstantinos, Mukhanov, Lev, Karakonstantis, Georgios, Chatzidimitriou, Athanasios, Papadimitriou, George, Kaliorakis, Manolis, Gizopoulos, Dimitris, Hadjilambrou, Zacharias, Sazeides, Yiannakis, Lampropulos, Alejandro, Das, Shidhartha, Vo, Phong
Publikováno v:
Tovletoglou, K, Mukhanov, L, Karakonstantis, G, Chatzidimitriou, A, Papadimitriou, G, Kaliorakis, M, Gizopoulos, D, Hadjilambrou, Z, Sazeides, Y, Lampropoulos, A, Das, S & Vo, P 2018, Measuring and Exploiting Guardbands of Server-Grade ARMv8 CPU Cores and DRAMs . in 2018 48th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN): Proceedings . pp. 6-9, IEEE/IFIP International Conference on Dependable Systems and Networks, Luxembourg, Luxembourg, 25/06/2018 . https://doi.org/10.1109/DSN-W.2018.00013
DSN Workshops
2018 48th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W)
DSN Workshops
2018 48th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W)
In this paper, we present the results of our comprehensive measurement study of the timing and voltage guardbands in memories and cores of a commodity ARMv8 based micro-server. Using various synthetic micro-benchmarks, we reveal how the adopted volta
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::24ee791b7dac51fd06df7ef538e82895
https://pure.qub.ac.uk/en/publications/measuring-and-exploiting-guardbands-of-servergrade-armv8-cpu-cores-and-drams(547b2ecd-2123-4436-a140-3287a149c95b).html
https://pure.qub.ac.uk/en/publications/measuring-and-exploiting-guardbands-of-servergrade-armv8-cpu-cores-and-drams(547b2ecd-2123-4436-a140-3287a149c95b).html
Autor:
Zompakis, Nikolaos, Noltsis, Michail, Ndreu, L., Hadjilambrou, Zacharias, Englezakis, Panayiotis, Nikolaou, Panagiota, Portero, Antoni, Libutti, S., Massari, Giuseppe, Sassi, F., Bacchini, A., Nicopoulos, Chrysostomos A., Sazeides, Yiannakis, Vavrik, R., Golasowski, M., Sevcik, J., Vondrak, V., Catthoor, F., Fornaciari, W., Soudris, Dimitrios J.
Publikováno v:
DATE
Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017
20th Design, Automation and Test in Europe, DATE 2017
Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017
20th Design, Automation and Test in Europe, DATE 2017
Continuously increasing application demands on both High Performance Computing (HPC) and Embedded Systems (ES) are driving the IC manufacturing industry on an everlasting scaling of devices in silicon. Nevertheless, integration and miniaturization of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::fe0af4864075a14126fddfd17f4f6097
http://hdl.handle.net/11311/1027598
http://hdl.handle.net/11311/1027598
Autor:
Tovletoglou, Konstantinos, Chalios, Charalambos, Karakonstantis, Georgios, Mukhanov, Lev, Vandierendonck, Hans, Nikolopoulos, Dimitrios, Koutsovasilis, Panos, Maroudas, Manolis, Antonopoulos, Christos, Kalogirou, Christos, Bellas, Nikos, Lalis, Spyros, Rafique, M. Mustafa, Venugopal, Srikumar, Prat-Perez , Arnau, Diavastos, Andreas, Hadjilambrou, Zacharias, Nikolaou, Panagiota, Sazeides, Yiannakis, Trancoso, Pedro, Papadimitriou, George, Kaliorakis, Manolis, Chatzidimitriou, Athanasios, Gizopoulos, Dimitris
Publikováno v:
Tovletoglou, K, Chalios, C, Karakonstantis, G, Mukhanov, L, Vandierendonck, H, Nikolopoulos, D, Koutsovasilis, P, Maroudas, M, Antonopoulos, C, Kalogirou, C, Bellas, N, Lalis, S, Rafique, M M, Venugopal, S, Prat-Perez, A, Diavastos, A, Hadjilambrou, Z, Nikolaou, P, Sazeides, Y, Trancoso, P, Papadimitriou, G, Kaliorakis, M, Chatzidimitriou, A & Gizopoulos, D 2016, ' An Energy-Efficient and Error-Resilient Server Ecosystem Exceeding Conservative Scaling Limits ', Paper presented at Workshop on Energy-efficient Servers for Cloud and Edge Computing 2017, Stockholm, Sweden, 23/01/2017-23/01/2017 .
The explosive growth of Internet-connected devices will result in a flood of generated data, which will increase the demand for network bandwidth as well as compute power to process the generated data. Consequently, there is a need for more energy ef
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od______2607::f9bc72d9e5568082ae6749eb8db856e0
https://pure.qub.ac.uk/en/publications/32e0f2b1-3865-4bf4-9798-79161257b837
https://pure.qub.ac.uk/en/publications/32e0f2b1-3865-4bf4-9798-79161257b837
Akademický článek
Tento výsledek nelze pro nepřihlášené uživatele zobrazit.
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Autor:
Kleanthous, Marios, Sazeides, Yiannakis, Ozer, E., Nicopoulos, Chrysostomos A., Nikolaou, Panagiota, Hadjilambrou, Zacharias, Kleanthous, Marios M.
Publikováno v:
IEEE Computer Architecture Letters
IEEE Comput.Archit.Lett.
IEEE Comput.Archit.Lett.
The common practice for quantifying the benefit(s) of design-time architectural choices of server processors is often limited to the chip- or server-level. This quantification process invariably entails the use of salient metrics, such as performance
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::11919dac706ed887da1520b9e994f154
http://gnosis.library.ucy.ac.cy/handle/7/43818
http://gnosis.library.ucy.ac.cy/handle/7/43818