Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Ha-Ai Nguyen"'
Publikováno v:
2021 IEEE 71st Electronic Components and Technology Conference (ECTC).
Growth in the usage of heterogenous integration and chiplets-based designs in modern advanced packages for leading applications like AI and HPC is driving the need for very large chip sizes that exceed the dimensions of a single back-end stepper expo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::927770d465b8e1aa8940c8758c6aedd6
https://doi.org/10.1109/ectc32696.2021.00321
https://doi.org/10.1109/ectc32696.2021.00321
Publikováno v:
2020 IEEE 70th Electronic Components and Technology Conference (ECTC).
Wafer-level packaging with high density fan-out (HDFO) requires multiple redistribution layers (RDL) to handle the high-density interconnections and the large data transfer rates between chips in the package. Decreasing the critical dimension (CD) of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d28c73578bba241778250a7175cea319
https://doi.org/10.1109/ectc32862.2020.00179
https://doi.org/10.1109/ectc32862.2020.00179
Autor:
Andy Miller, Akito Hiro, Romain Ridremont, John Slabbekoorn, Samuel Suhard, Robert Hsieh, Warren W. Flack, Ha-Ai Nguyen
Publikováno v:
2018 IEEE 20th Electronics Packaging Technology Conference (EPTC).
This study investigates creation of $1.0 \mu \mathrm{m}$ RDL structures by a damascene process utilizing a photosensitive permanent dielectric material. The advantage of the photosensitive dielectric approach is that the Cu overburden removal does no
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6169bd12f6aa5c0f286fbd515d9223c4
https://doi.org/10.1109/eptc.2018.8654363
https://doi.org/10.1109/eptc.2018.8654363
Publikováno v:
2017 IEEE 19th Electronics Packaging Technology Conference (EPTC).
Fan-Out wafer level packaging has seen rapid adoption over the last few years due to its form factor, performance, and cost advantages compared to 3D packaging techniques. Redistribution layers (RDL) are used to route the very high density connection
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8202099928c9d84ea4f5adaf2e7d8811
https://doi.org/10.1109/eptc.2017.8277536
https://doi.org/10.1109/eptc.2017.8277536
Publikováno v:
Proceedings of SPIE.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4c36d8d510649a9e48226aee0098c184
https://doi.org/10.1117/12.711606
https://doi.org/10.1117/12.711606
Publikováno v:
2007 12th International Symposium on Advanced Packaging Materials: Processes, Properties, and Interfaces.
As pin counts and interconnection densities increase there is growing interest in copper pillar bumps for flip chip and wafer-level packaging. This trend is driven by the need to increase interconnect performance as well as reduce interconnect cost.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e335aa9c1d2e69323522cf3c347dde52
https://doi.org/10.1109/isapm.2007.4419942
https://doi.org/10.1109/isapm.2007.4419942
Publikováno v:
SPIE Proceedings.
The requirements for highly specialized photosensitive materials for nanotechnology and Micro-Electro-Mechanical Systems (MEMS) applications are being driven by the rapid growth of consumer products incorporating these devices. These high volume cons
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0183e38f89edf7a7f2a7380e031b6eb5
https://doi.org/10.1117/12.655721
https://doi.org/10.1117/12.655721
Publikováno v:
SPIE Proceedings.
The widespread adoption of advanced packaging techniques is driven by electrical device performance and chip form factor considerations. Flipchip packaging is currently growing at a 25% compound annual rate and it is expected that 90% of all 65 nm lo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cc06bd12ecd656a3a2eaaa716569d886
https://doi.org/10.1117/12.655727
https://doi.org/10.1117/12.655727
Autor:
Ping Hung Lu, Bob Plass, Ernesto Sison, Yoshio Murakami, Mark Neisser, Toshimichi Makii, Warren W. Flack, Ha-Ai Nguyen
Publikováno v:
SPIE Proceedings.
The performance requirements for ultra-thick photoresists are rapidly increasing with the dramatic growth in lithographic applications that require electroplating processes. Two of the main applications for ultra-thick photoresists are advanced packa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d49e6dc9da670562d04afa0ce8cde504
https://doi.org/10.1117/12.598469
https://doi.org/10.1117/12.598469