Zobrazeno 1 - 10
of 152
pro vyhledávání: '"H.T. Vierhaus"'
Autor:
H.T. Vierhaus, M. Pflanz
Publikováno v:
IEEE Micro. 21:24-40
Efficient online check and fast recovery techniques for embedded systems aim to detect single or multiple errors within the same clock cycle in which they occur. It is argued that such techniques can enable fast error correction; detection of illegal
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1ad19c352eed453d91f2a2a7d5d434e8
https://doi.org/10.1109/40.958697
https://doi.org/10.1109/40.958697
Autor:
M Pflanz, H.T Vierhaus
Publikováno v:
Solid-State Electronics. 44:791-796
Embedded processors are often used in safety-critical applications such as automotive engineering. Then a high level of reliability over a long lifetime is a critical demand. Higher levels of integration associated with decreasing feature size and lo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fd3f449384cdbacdc1dba98a08082f57
https://doi.org/10.1016/s0038-1101(99)00275-0
https://doi.org/10.1016/s0038-1101(99)00275-0
Autor:
M. Pflanz, H.T. Vierhaus
Publikováno v:
IEEE Micro. 18:33-41
This approach to designing fault-tolerant embedded systems-using PLDs to duplicate application-specific hardware-significantly reduces the costs of classical fault-tolerance techniques.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ae0700b0bf9f00cdc3359fad8b949916
https://doi.org/10.1109/40.735942
https://doi.org/10.1109/40.735942
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 16:1292-1310
Performance optimization of automatic test pattern generation (ATPG) algorithms has received considerable attention. While the application of high-performance algorithms is often limited to simple gates such as AND's, OR's, and XOR, the cell librarie
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bbc043f037cdaf976f73d2d1aaecbd6c
https://doi.org/10.1109/43.663819
https://doi.org/10.1109/43.663819
Publikováno v:
Microprocessing and Microprogramming. 32:791-796
Methods for test generation providing high fault coverage for non-trivial faults in CMOS circuits have been a subject of intense research for several years. By test generation from switch level netlists, a good fault coverage is possible also for cir
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::16629d4e7cf1f5708e7b825b353e32b9
https://doi.org/10.1016/0165-6074(91)90438-y
https://doi.org/10.1016/0165-6074(91)90438-y
Autor:
Olaf Stern, H.T. Vierhaus
Publikováno v:
Microprocessing and Microprogramming. 30:509-512
Testability of CMOS faults has been a matter of concern for a long time. Most probably the fault coverage by conventional test patterns is relatively high for simple gates, but reaching truly high fault coverage for non-trivial faults in complex gate
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3158eca460a02478e8ccf8d671af7360
https://doi.org/10.1016/0165-6074(90)90291-g
https://doi.org/10.1016/0165-6074(90)90291-g
Publikováno v:
ITC
Automatic test pattern generation yielding high fault coverage also for non-trivial faults in CMOS circuits has found a wide attention in industry and research for a long time. Test generation from gate level netlists is quite efficient, but has shor
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e6f72d7a766dd64b97bf637f0a4974a7
https://doi.org/10.1109/test.1992.528533
https://doi.org/10.1109/test.1992.528533
Publikováno v:
IEEE/ACM International Conference on Computer-Aided Design.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::902d3b81a3bdf985dc65d7fa6f4eb6f3
https://doi.org/10.1109/iccad.1994.629740
https://doi.org/10.1109/iccad.1994.629740
Autor:
S. Misera, H.T. Vierhaus
Publikováno v:
Parallel Computing in Electrical Engineering, International Conference on.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d996307dd3af8b7f399eb9ac6593d54e
https://doi.org/10.1109/pcee.2004.34
https://doi.org/10.1109/pcee.2004.34
Publikováno v:
Proceedings. 10th IEEE International On-Line Testing Symposium.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3bafa401df23d400144176d77ccef590
https://doi.org/10.1109/olt.2004.1319657
https://doi.org/10.1109/olt.2004.1319657