Zobrazeno 1 - 10
of 106
pro vyhledávání: '"H. Gossmann"'
Autor:
R. Pfab, J. Birkmann, W. Zeller, H. H. Gossmann, Hubert Köppler, Karl-Heinz Pflüger, C. Gropp, H. Kuhn, E. U. Steinhauer, Klaus Havemann, E. Lötzke, S. Oehl, Harald Stein, I. Eschenbach, Karl Lennert, P. Drings
Publikováno v:
Hematological Oncology. 9:217-223
In a multicentre phase III trial 146 previously untreated patients with high grade non-Hodgkin's lymphomas stage II–IV were randomized to receive either four cycles of CHOEP (cyclophosphamide 750 mg/m2 iv d 1, doxorubicin 50 mg/m2 iv d 1, vincristi
Autor:
Eric Garfunkel, Ahmet Refik Kortan, A. M. Sergent, H. Gossmann, J. Kwo, P. Ye, Torgny Gustafsson, Yves J. Chabal, B. Yang, W. H. Schulte, J.P. Mannaerts, J. Bude, K. K. Ng, Minghwei Hong, B. Busch, David A. Muller
Publikováno v:
Journal of Crystal Growth. 251:645-650
Our ability of controlling the growth and interfaces of thin dielectric films on III–V semiconductors by ultrahigh vacuum deposition has led to investigations of gate stacks containing rare earth oxides of Gd 2 O 3 and Y 2 O 3 as alternative high
Autor:
H. H. Goßmann
Publikováno v:
Balint Journal. 2:122-124
Autor:
D. Schepis, C.Y. Sung, H. Yin, B. Kim, B. Yang, M. Khare, L. Black, C. D. Sheraw, Donggun Park, H.V. Meer, X. Chen, J. Johnson, Andrew Waite, K. Nummy, H. Gossmann, P. Agnello, Philip A. Fisher, Scott Luning, S. Narasimha, D. Chidambarrao, Judson R. Holt, S. D. Kim, D. Wehella-gamage, Y. Liu
Publikováno v:
2007 IEEE Symposium on VLSI Technology.
This work demonstrates that the ~2times mobility advantage of (110) PMOS over (100) PMOS is maintained down to 190 nm liners poly-pitch for devices under compressive stress. (110) PMOS with 3.5 GPa compressively stressed liners demonstrate strong cha
Autor:
A. Agarwal, H. Gossmann
Publikováno v:
The Fourth International Workshop on Junction Technology, 2004. IWJT '04..
The most recent release of the ITRS, the 2003 edition, describes a paradigm change that Si chip manufacturing is expected to undergo around the 65nm node. This is due to the rapid introduction of new materials and device structures required for furth
Autor:
A. Agarwal, H. Gossmann
Publikováno v:
The Fourth International Workshop on Junction Technology, 2004. IWJT '04..
Autor:
Torgny Gustafsson, K. K. Ng, Ahmet Refik Kortan, Eric Garfunkel, P. Ye, H. Gossmann, W. H. Schulte, B. Yang, Yves J. Chabal, B.W. Busch, David A. Muller, A.M. Sergent, J. Kwo, J. Bude, Minghwei Hong, J.P. Mannaerts
Publikováno v:
International Conference on Molecular Bean Epitaxy.
Nanoscale device technology is driving intense study of thin dielectric layers on semiconductors. The aggressive scaling of Si CMOS technology calls for identifying high /spl kappa/ dielectrics to replace SiO/sub 2/ and oxynitrides in gate related ap
Autor:
G. Timp, K.K. Bourdelle, J.E. Bower, F.H. Baumann, T. Boone, R. Cirelli, K. Evans-Lutterodt, J. Garno, A. Ghetti, H. Gossmann, M. Green, D. Jacobson, Y. Kim, R. Kleiman, F. Klemens, A. Kornlit, C. Lochstampfor, W. Mansfield, S. Moccio, D.A. Muller, I.E. Ocola, M.I. O'Malley, J. Rosamilia, J. Sapjeta, P. Silverman, T. Sorsch, D.M. Tennant, W. Timp, B.E. Weir
Publikováno v:
International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).
One of the primary means for improving performance and increasing the scale of integration on a chip is the miniaturization of the electronic devices that comprise it. The SIA roadmap projects that future gains in performance will continue to accrue
Autor:
G. Timp, A. Agarwal, K.K. Bourdella, J. Bower, T. Boone, A. Ghetti, M. Green, J. Gamo, H. Gossmann, D. Jacobson, R. Kleiman, A. Kornblit, F. Klemens, S. Moccio, M.L. O'Malley, L. Ocola, J. Rossm-nalia, J. Sapjeta, P. Silverman, T. Sorsch, W. Timp, D. Tennani
Publikováno v:
International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).
Reports measurements of the DC characteristics of sub-100nm pMOSFETs that employ low leakage, ultra-thin gate oxides only 1-2nm thick and ultra-shallow junctions to achieve high current drive capability and transconductance. We demonstrate that I/sub
Autor:
G. Timp, A. Agarwal, F.H. Baumann, T. Boone, M. Buonanno, R. Cirelli, V. Donnelly, M. Foad, D. Grant, M. Green, H. Gossmann, S. Hillenius, J. Jackson, D. Jacobson, R. Kleiman, A. Komblit, F. Klemens, J.T.-C. Lee, W. Mansfield, S. Moccio, A. Murrell, M. O'Malley, J. Rosamilia, J. Sapjeta, P. Silverman, T. Sorsch, W.W. Tai, D. Tennant, H. Vuong, B. Weir
Publikováno v:
International Electron Devices Meeting. IEDM Technical Digest.
Reports measurements of the DC characteristics of sub-100 nm nMOSFETs that employ low leakage ultra-thin gate oxides only 1-2 nm thick to achieve high current drive capability and transconductance. We demonstrate that I/sub Dsat//spl ap/1.8 mA//spl m