Zobrazeno 1 - 10
of 23
pro vyhledávání: '"H, Prashantha Kumar"'
Autor:
Gunnery Srinath, H. Prashantha Kumar, Pathipati Srihari, Ratnasingham Tharmarasa, Thiagalingam Kirubarajan
Publikováno v:
IEEE Access, Vol 10, Pp 11173-11190 (2022)
Spectral congestion necessitates the in-band operation or the spectrum-sharing of legacy radar and communication systems. Since these systems operate in the same band in spectrum-sharing mode, they interfere with one another. To address this problem
Externí odkaz:
https://doaj.org/article/817d2aa2174f47d1a88763cf36316694
Publikováno v:
ICTACT Journal on Communication Technology, Vol 3, Iss 1, Pp 498-503 (2012)
The boundaries between block and convolutional codes have become diffused after recent advances in the understanding of the trellis structure of block codes and the tail-biting structure of some convolutional codes. Therefore, decoding algorithms tra
Externí odkaz:
https://doaj.org/article/0586dd1b21324d3c82ddee7a0753ffcf
Publikováno v:
ICTACT Journal on Communication Technology, Vol 2, Iss 3, Pp 400-405 (2011)
Low density parity check (LDPC) codes are capacity-approaching codes, which means that practical constructions exist that allow the noise threshold to be set very close to the theoretical Shannon limit for a memory less channel. LDPC codes are findin
Externí odkaz:
https://doaj.org/article/0826989fc56b4eb8888da30c713d0012
Publikováno v:
Microelectronics Journal. 61:114-122
A low power, single to differential (balun) low noise amplifier (LNA) using noise cancellation and current re-use techniques is presented for ultra wide-band applications. An upsurge balun LNA is designed using UMC 0.18-m RF CMOS technology with an e
Autor:
K, Vasudeva Reddy1 (AUTHOR) vasuec14f05@nitk.edu.in, H, Prashantha Kumar1 (AUTHOR)
Publikováno v:
International Journal of Electronics. Sep2019, Vol. 106 Issue 9, p1412-1426. 15p.
Publikováno v:
International Journal of Electronics. 99:683-693
In this article, we propose a high-speed decoding algorithm for binary BCH codes that can correct up to 7 bits in error. Evaluation of the error-locator polynomial is the most complicated and time-consuming step in the decoding of a BCH code. We have
Publikováno v:
2010 5th International Conference on Industrial and Information Systems.
Davydov and Tombak have designed an excellent single error correction-double error detection (SEC-DED) code that appears to be more capable of detecting triple and quadruple errors than the conventional Hamming SEC-DED codes. These codes have been ap
Publikováno v:
2010 5th International Conference on Industrial and Information Systems.
Flash memories have found extensive application for use in portable storage devices. They have been used for code storage as well as data storage. The storage density associated with these devices has increased tremendously in the past few years. Thi
Publikováno v:
International Journal of Information and Communication Technology. 4:40
Flash memories have found extensive application for use in storage devices. The storage capacity and reliability of these devices have increased enormously over the years. With increase in density of data storage, the raw bit error rate (RBER), assoc