Zobrazeno 1 - 10
of 11
pro vyhledávání: '"Gyung-jin Min"'
Publikováno v:
Surface and Coatings Technology. 228:S511-S515
The vacuum ultraviolet (VUV) induced damage on gate oxide of metal–oxide–semiconductor field effect transistor in the high density plasma during a oxide deposition has been a serious issue in fabricating DRAM and flash memory devices with high-de
Publikováno v:
Thin Solid Films. 520:5007-5010
This paper presents the characterization of degradation of tunnel oxide during plasma recess of field oxide films for Shallow Trench Isolation (STI) in sub 30 nm flash memory devices. Simple plasma charge damage monitor wafers with Metal-Oxide-Semico
Autor:
Joo-Tae Moon, Yong-jin Kim, Kye Hyun Baek, Gyung-jin Min, KH Bai, Chang-Jin Kang, Han-Ku Cho, Ken Tokashiki
Publikováno v:
Thin Solid Films. 515:4864-4868
Plasma process-induced “white pixel defect” (WPD) of CMOS active pixel sensor (APS) is studied for Si3N4 spacer etch back process by using a magnetically enhanced reactive ion etching (MERIE) system. WPD preferably takes place at the wafer edge r
Autor:
Gyung-jin Min, Seok-Hyun Lim, Chul-Ho Shin, Sung-Chan Park, Chang-Jin Kang, Han-Ku Cho, Joo-Tae Moon
Publikováno v:
Thin Solid Films. 515:4923-4927
In this study, etching characteristics of oval-shaped contact were investigated. The oval-shaped contact showed different etching characteristics compared to the circular contact. The long axis cross-section of oval-shaped contact showed a more verti
Autor:
Hak-sun Lee, Woo-Sung Han, Chang-Jin Kang, Nammyun Cho, Kyoung-sub Shin, Joo-Tae Moon, Gyung-jin Min
Publikováno v:
Thin Solid Films. 517:3844-3846
This paper reports on the process dependence of contact resistance of silicide/n+ Si and silicide/p+ Si contact. Three processes such as contact etching, Si treatment and pre-treatment are investigated with contact resistance point of view. Only sili
Publikováno v:
ISSM 2005, IEEE International Symposium on Semiconductor Manufacturing, 2005..
A systematic method to optimize conditioning processes is introduced. By using the plasma monitoring tools such as self-excited electron resonance spectroscopy (SEERS) and optical emission spectroscopy (OES), chamber conditions are analyzed in real t
Publikováno v:
ISSM 2005, IEEE International Symposium on Semiconductor Manufacturing, 2005..
As the DRAM gate CD is a critical parameter for contact resistance for self-aligned contact as well as transistor performance, CD control by change of process parameter such as O/sub 2/ flow rate is introduced to suppress the wafer-to-wafer and lot-t
Publikováno v:
ISSM 2005, IEEE International Symposium on Semiconductor Manufacturing, 2005; 2005, p129-131, 3p
Publikováno v:
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures. 23:125
With the introduction of 300mm wafer and sub-100nm technology processes, semiconductor manufacturers are gradually paying attention to efficient methods for process and equipment control, which is conventionally called advanced process control (APC)
Publikováno v:
Journal of Vacuum Science & Technology: Part B-Microelectronics & Nanometer Structures; 2005, Vol. 23 Issue 1, p125-129, 5p