Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Gyeong-Gu Kang"'
Publikováno v:
IEEE Journal of Solid-State Circuits. 57:3825-3839
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::682c17f80f8d785e62fbe7efa13c8edf
https://doi.org/10.1109/jssc.2022.3193738
https://doi.org/10.1109/jssc.2022.3193738
Publikováno v:
IEEE Solid-State Circuits Letters. 5:296-299
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0b8050f91f7d5f719c05c6a55971997c
https://doi.org/10.1109/lssc.2022.3229253
https://doi.org/10.1109/lssc.2022.3229253
Publikováno v:
IEEE Journal of Solid-State Circuits. 56:3593-3607
For fast buffering of large stepwise input to an nF-range capacitive load, this article presents a 5-V rail-to-rail (RTR) input–output paralleled-amplifier (PA) in which a dynamic class-C amplifier (DCCA) and a linear single-stage operational trans
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0cdfb1da73a66e6f87533dbf67507eef
https://doi.org/10.1109/jssc.2021.3101895
https://doi.org/10.1109/jssc.2021.3101895
Publikováno v:
ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::23b0be577f1c1c48f3cff874beff0437
https://doi.org/10.1109/esscirc55480.2022.9911468
https://doi.org/10.1109/esscirc55480.2022.9911468
Autor:
Hyunki Han, Min-Woo Ko, Jeong-Hyun Cho, Gyeong-Gu Kang, Seok-Tae Koh, Hong-Hyun Bae, Hyun-Sik Kim
Publikováno v:
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::10d8f36b3e58104e5e8bcdecc591d462
https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830233
https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830233
Publikováno v:
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c4813774b65d88f36517e35c330f16af
https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830181
https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830181
Publikováno v:
2022 IEEE International Solid- State Circuits Conference (ISSCC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d206c8a2221e36d7ae374827c365ae7a
https://doi.org/10.1109/isscc42614.2022.9731585
https://doi.org/10.1109/isscc42614.2022.9731585
Publikováno v:
2022 IEEE International Solid- State Circuits Conference (ISSCC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b3016e3d7d3331b48a7245f786567827
https://doi.org/10.1109/isscc42614.2022.9731605
https://doi.org/10.1109/isscc42614.2022.9731605
Autor:
Oh-Jo Kwon, Seong-Joo Lee, Woojin Jang, Gyeong-Gu Kang, Keum-Dong Jung, Hyun-Sik Kim, Seok-Tae Koh, Jiho Lee
Publikováno v:
VLSI Circuits
This paper presents an OLED/μLED display driver IC with cascaded loading-free capacitive interpolation (LFCI) DAC and a high-slew buffer amplifier. The 12-bit color-depth is realized by a combination of 7-bit R-DAC and proposed 5-bit LFCI DAC while
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9c9da974b7a7a4da88c9385f456a4593
https://doi.org/10.23919/vlsicircuits52068.2021.9492490
https://doi.org/10.23919/vlsicircuits52068.2021.9492490
Publikováno v:
VLSI Circuits
This paper presents an always-dual-path (ADP) DC-DC converter that achieves 4.5V-input 0.3-to-1.7V-output buck conversion for battery-powered low-voltage SoCs. Regardless of voltage conversion ratio (VCR), the proposed ADP converter maintains the ind
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a1831a6df313ff88bc6bae764ffb622e
https://doi.org/10.23919/vlsicircuits52068.2021.9492478
https://doi.org/10.23919/vlsicircuits52068.2021.9492478