Zobrazeno 1 - 10
of 21
pro vyhledávání: '"Gwangsun Kim"'
Autor:
Hyungkyu Ham, Hyunuk Cho, Minjae Kim, Jueon Park, Jeongmin Hong, Hyojin Sung, Eunhyeok Park, Euicheol Lim, Gwangsun Kim
Publikováno v:
IEEE Access, Vol 12, Pp 142651-142667 (2024)
Currently, GPUs face significant challenges due to limited off-chip bandwidth (BW) and memory capacity during DNN training. To address these bottlenecks, we propose a memory access-triggered near-data processing matNDP architecture that offloads memo
Externí odkaz:
https://doaj.org/article/5e0733ab887241b48181918dc53d2a04
Publikováno v:
IEEE Computer Architecture Letters. 21:61-64
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0af163003f09d12d5261406ba8ea426b
https://doi.org/10.1109/lca.2022.3196932
https://doi.org/10.1109/lca.2022.3196932
Autor:
Eunhyeok Park, Jeongmin Hong, Euicheol Lim, Hyunuk Cho, Minjae Kim, Gwangsun Kim, Jueon Park, Hyungkyu Ham, Hyojin Sung
Publikováno v:
IEEE Computer Architecture Letters. 20:171-174
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b391c317837d8112b55fbcb649300227
https://doi.org/10.1109/lca.2021.3126450
https://doi.org/10.1109/lca.2021.3126450
Publikováno v:
Proceedings of the 49th Annual International Symposium on Computer Architecture.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b131081d9f67639514cfce3aba30416b
https://doi.org/10.1145/3470496.3527389
https://doi.org/10.1145/3470496.3527389
Autor:
John Kim, Gwangsun Kim, Jung Ho Ahn, Jongwook Chung, Wonjun Song, Hyung-Joon Jung, Jae W. Lee
Publikováno v:
ASPLOS
NUMA (non-uniform memory access) servers are commonly used in high-performance computing and datacenters. Within each server, a processor-interconnect (e.g., Intel QPI, AMD HyperTransport) is used to communicate between the different sockets or nodes
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::142d2ea32d69077a660578a479ae77e2
https://doi.org/10.1145/3093315.3037753
https://doi.org/10.1145/3093315.3037753
Autor:
Onur Mutlu, Niladrish Chatterjee, Stephen W. Keckler, Gwangsun Kim, Mike O'Connor, Eiman Ebrahimi, Kevin Hsieh, Nandita Vijaykumar
Publikováno v:
ISCA
Main memory bandwidth is a critical bottleneck for modern GPU systems due to limited off-chip pin bandwidth. 3D-stacked memory architectures provide a promising opportunity to significantly alleviate this bottleneck by directly connecting a logic lay
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3616917e8041cdaf787718e56bbf8d99
https://doi.org/10.1145/3007787.3001159
https://doi.org/10.1145/3007787.3001159
Publikováno v:
IEEE Transactions on Computers. 65:480-494
A cost-efficient network-on-chip is needed in a scalable many-core systems. Recent multicore processors have leveraged a ring topology and hierarchical ring can increase scalability but presents different challenges, including higher hop count and gl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::98fa50e7fe1d46fef4271b05baa99be7
https://doi.org/10.1109/tc.2015.2417525
https://doi.org/10.1109/tc.2015.2417525
Publikováno v:
ISCA
High-radix topologies in large-scale networks provide low network diameter and high path diversity, but the idle power from high-speed links results in energy inefficiency, especially at low traffic load. In this work, we exploit the high path divers
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::98722a7e6e285825e3c2980e4bbb0e75
https://doi.org/10.1109/isca.2018.00065
https://doi.org/10.1109/isca.2018.00065
Publikováno v:
SC
3D-stacked memory devices with processing logic can help alleviate the memory bandwidth bottleneck in GPUs. However, in order for such Near-Data Processing (NDP) memory stacks to be used for different GPU architectures, it is desirable to standardize
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b4b6e6f8468cd803606479ec92fbac08
https://doi.org/10.1145/3126908.3126965
https://doi.org/10.1145/3126908.3126965
Publikováno v:
IEEE Transactions on Computers. 63:1487-1500
Many-core processors will have many processing cores with a network-on-chip (NoC) that provides access to shared resources such as main memory and on-chip caches. However, locally-fair arbitration in multi-stage NoC can lead to globally unfair access
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b9cb569fe11211b8550e02d95ff46b87
https://doi.org/10.1109/tc.2012.241
https://doi.org/10.1109/tc.2012.241