Zobrazeno 1 - 10
of 17
pro vyhledávání: '"Guipeng Sun"'
Autor:
Siyang Liu, Weifeng Sun, Guipeng Sun, Chaoqi Xu, Ruibin Cao, Feng Lin, Shuxian Chen, Geng Helong, Wangran Wu
Publikováno v:
IEEE Transactions on Electron Devices. 68:421-424
In this brief, the contact etch stop layer (CESL) stressor is introduced to improve the performance of n-type lateral double-diffused MOSFET (nLDMOSFET) with various operating voltages. Three groups of nLDMOSFETs were studied to demonstrate the effec
Autor:
Zhaoji Li, Feng Lin, Wang Zhengkang, Qi Zhao, Ming Qiao, Guipeng Sun, Liang Longfei, Sen Zhang, Bo Zhang
Publikováno v:
IEEE Electron Device Letters. 41:453-456
A novel high trigger current NPN transistor (HTC-NPN) with excellent double-snapback performance is developed in $0.5\mu \text{m}$ Bipolar CMOS DMOS (BCD) technology. A new floating N+ (FN) layer fabricated in drift-region not only induces two-stage
Autor:
Hongting Chen, Long Zhang, Weifeng Sun, He Boyong, Haibo Wu, Shengli Lu, Wei Su, Ran Ye, Feng Lin, Guipeng Sun, Siyang Liu, Wangran Wu, Li Lu
Publikováno v:
IEEE Transactions on Electron Devices. 67:185-192
Compared with the full shallow trench isolation (full-STI) lateral double-diffused MOS (LDMOS), the split-STI LDMOS has been demonstrated as a superior device with better breakdown voltage (BVOFF and specific on-resistance ( ${R}_{ {\scriptstyle\math
Autor:
Wangran Wu, Ran Ye, Hongting Chen, Feng Lin, Long Zhang, Siyang Liu, Weifeng Sun, Shengli Lu, Jiaxing Wei, Wei Su, Li Lu, Guipeng Sun, Haibo Wu
Publikováno v:
IEEE Transactions on Electron Devices. 66:2869-2875
The lateral double-diffusion MOS with split shallow trench isolation structure (split-STI LDMOS) in the drift region has been investigated under two hot-carrier stresses including the maximum bulk current stress ( ${I}_{\text {bulkmax}}$ ) and maximu
Autor:
Fen Lin, Yu Zhiguo, Xu Qiang, Xiaofeng Gu, Liang Hailian, Guipeng Sun, Sen Zhang, Ling Zhu, Kui Xiao
Publikováno v:
IEEE Electron Device Letters. 40:163-166
A novel gate diode triggered silicon-controlled rectifier (GDTSCR) with dual-direction high-voltage (HV) electrostatic discharge (ESD) protection and a low snap-back voltage is proposed and investigated. Compared to conventional MOS triggered SCR (MT
Autor:
Ran Ye, Xue Ying, Siyang Liu, Shulang Ma, Weifeng Sun, Ye Tian, Wei Su, Yuwei Liu, Guipeng Sun, Feng Lin
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 18:284-290
The influences of three typical latch-up immunity structures, including high concentrated P++ doping layer, N+/P+ segmented emitter and P-sink well, upon electro-static discharge (ESD) robustness of the silicon-on-insulator lateral insulated gate bip
Autor:
Sheng Li, Li Zhichao, Feng Lin, Yuwei Liu, Weifeng Sun, Siyang Liu, Wei Su, Shulang Ma, Guipeng Sun
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 17:780-784
Maximum operating gate voltage ( ${\mathbf{V}}_{\mathbf{gmax}} $ ) stress is observed and confirmed as the worst hot-carrier degradation condition for the lateral double-diffused MOS (LDMOS) with multiple floating poly-gate field plates. To reduce th
Autor:
Fang Yunchao, Guipeng Sun, Weifeng Sun, Feng Lin, Yuwei Liu, Shulang Ma, Ren Xiaofei, Siyang Liu, Wei Su
Publikováno v:
IEEE Transactions on Electron Devices. 64:3275-3281
The electrical parameters degradations of lateral double-diffused MOS with multiple floating poly-gate field plates under different stress conditions have been investigated experimentally. For the maximum substrate current ( ${I}_{{\text {submax}}})$
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 17:450-457
In this paper, the layout arrangement concern for the lateral double-diffused metal-oxide-semiconductor (LDMOS) device with a large geometric array used as the output device has been investigated. Three phenomena have been discovered according to the
Publikováno v:
2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA).
The off-state BV degradation was studied by TCAD simulations and silicon experiments. The degradation was caused by high electrical field in the silicon surface and poor reduced surface field (RESURF) effect during on-state, as the serious Kirk-effec